3 files changed, 6 insertions, 16 deletions
diff --git a/arch/arm/include/asm/arch-zynq/gpio.h b/arch/arm/include/asm/arch-zynq/gpio.h
index 2dbba756d7..a26ae87293 100644
--- a/arch/arm/include/asm/arch-zynq/gpio.h
+++ b/arch/arm/include/asm/arch-zynq/gpio.h
@@ -7,19 +7,4 @@
 #ifndef _ZYNQ_GPIO_H
 #define _ZYNQ_GPIO_H
 
-inline int gpio_get_value(unsigned gpio)
-{
-	return 0;
-}
-
-inline int gpio_set_value(unsigned gpio, int val)
-{
-	return 0;
-}
-
-inline int gpio_request(unsigned gpio, const char *label)
-{
-	return 0;
-}
-
 #endif /* _ZYNQ_GPIO_H */
diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h
index 2aede0c552..e2e0b7321a 100644
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -21,6 +21,9 @@
 #define ZYNQ_I2C_BASEADDR1		0xE0005000
 #define ZYNQ_SPI_BASEADDR0		0xE0006000
 #define ZYNQ_SPI_BASEADDR1		0xE0007000
+#define ZYNQ_QSPI_BASEADDR		0xE000D000
+#define ZYNQ_SMC_BASEADDR		0xE000E000
+#define ZYNQ_NAND_BASEADDR		0xE1000000
 #define ZYNQ_DDRC_BASEADDR		0xF8006000
 #define ZYNQ_EFUSE_BASEADDR		0xF800D000
 #define ZYNQ_USB_BASEADDR0		0xE0002000
@@ -28,7 +31,9 @@
 
 /* Bootmode setting values */
 #define ZYNQ_BM_MASK		0x7
+#define ZYNQ_BM_QSPI		0x1
 #define ZYNQ_BM_NOR		0x2
+#define ZYNQ_BM_NAND		0x4
 #define ZYNQ_BM_SD		0x5
 #define ZYNQ_BM_JTAG		0x0
 
diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h b/arch/arm/include/asm/arch-zynq/sys_proto.h
index 89c47f3bd3..9d50e2478f 100644
--- a/arch/arm/include/asm/arch-zynq/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynq/sys_proto.h
@@ -20,7 +20,7 @@ extern void zynq_ddrc_init(void);
 extern unsigned int zynq_get_silicon_version(void);
 
 /* Driver extern functions */
-extern int zynq_sdhci_init(u32 regbase);
+extern int zynq_sdhci_init(phys_addr_t regbase);
 extern int zynq_sdhci_of_init(const void *blob);
 
 extern void ps7_init(void);