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-rw-r--r--arch/arm/include/asm/arch-mx5/crm_regs.h11
-rw-r--r--arch/arm/include/asm/arch-mx5/imx-regs.h3
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h
index 4ed8eb31c8..fcc0e36fa5 100644
--- a/arch/arm/include/asm/arch-mx5/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx5/crm_regs.h
@@ -200,4 +200,15 @@ struct mxc_ccm_reg {
/* Define the bits in register CLPCR */
#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS (0x1 << 18)
+#define MXC_DPLLC_CTL_HFSM (1 << 7)
+#define MXC_DPLLC_CTL_DPDCK0_2_EN (1 << 12)
+
+#define MXC_DPLLC_OP_PDF_MASK 0xf
+#define MXC_DPLLC_OP_MFI_MASK (0xf << 4)
+#define MXC_DPLLC_OP_MFI_OFFSET 4
+
+#define MXC_DPLLC_MFD_MFD_MASK 0x7ffffff
+
+#define MXC_DPLLC_MFN_MFN_MASK 0x7ffffff
+
#endif /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 098c30090f..d069209b58 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -100,6 +100,9 @@
#define PLL1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000)
#define PLL2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000)
#define PLL3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00088000)
+#ifdef CONFIG_MX53
+#define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000)
+#endif
#define AHBMAX_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000)
#define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000)
#define CSU_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000)