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-rw-r--r--arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
index 03fd46b724..66e206dd52 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
@@ -13,6 +13,8 @@
#ifndef _SUNXI_DRAM_SUN8I_H3_H
#define _SUNXI_DRAM_SUN8I_H3_H
+#include <linux/bitops.h>
+
struct sunxi_mctl_com_reg {
u32 cr; /* 0x00 control register */
u32 cr_r1; /* 0x04 rank 1 control register (R40 only) */
@@ -211,7 +213,6 @@ struct sunxi_mctl_ctl_reg {
* the 32-bit wide access consists of. Also three control signals can be
* adjusted individually.
*/
-#define BITS_PER_BYTE 8
#define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE)
/* The eight data lines (DQn) plus DM, DQS and DQSN */
#define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3)