diff options
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/clock.h | 7 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 9 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/cpu.h | 8 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/hardware.h | 13 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 13 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/armv7m.h | 19 | ||||
-rw-r--r-- | arch/arm/include/asm/armv7m_mpu.h | 67 | ||||
-rw-r--r-- | arch/arm/include/asm/global_data.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/omap_mmc.h | 9 | ||||
-rw-r--r-- | arch/arm/include/asm/system.h | 15 |
11 files changed, 125 insertions, 40 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index acf3fd55a8..19ccf5c8db 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -12,6 +12,7 @@ #define _CLOCKS_H_ #include <asm/arch/clocks_am33xx.h> +#include <asm/arch/hardware.h> #ifdef CONFIG_TI81XX #include <asm/arch/clock_ti81xx.h> @@ -103,6 +104,12 @@ extern const struct dpll_regs dpll_mpu_regs; extern const struct dpll_regs dpll_core_regs; extern const struct dpll_regs dpll_per_regs; extern const struct dpll_regs dpll_ddr_regs; +extern const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS]; +extern const struct dpll_params dpll_core_1000MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_per_192MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_ddr2_266MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_ddr3_303MHz[NUM_CRYSTAL_FREQ]; +extern const struct dpll_params dpll_ddr3_400MHz[NUM_CRYSTAL_FREQ]; extern struct cm_wkuppll *const cmwkup; diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h index 4c9352a2ed..653ec1b239 100644 --- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h +++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h @@ -16,14 +16,9 @@ #define MPUPLL_M_800 800 #define MPUPLL_M_720 720 #define MPUPLL_M_600 600 -#define MPUPLL_M_550 550 +#define MPUPLL_M_500 500 #define MPUPLL_M_300 300 -/* MAIN PLL Fdll = 550 MHz, by default */ -#ifndef CONFIG_SYS_MPUCLK -#define CONFIG_SYS_MPUCLK MPUPLL_M_550 -#endif - #define UART_RESET (0x1 << 1) #define UART_CLK_RUNNING_MASK 0x1 #define UART_SMART_IDLE_EN (0x1 << 0x3) @@ -31,6 +26,8 @@ #define CM_DLL_CTRL_NO_OVERRIDE 0x0 #define CM_DLL_READYST 0x4 +#define NUM_OPPS 6 + extern void enable_dmm_clocks(void); extern const struct dpll_params dpll_core_opp100; extern struct dpll_params dpll_mpu_opp100; diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 54f449f6e6..8cae291ea0 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -49,6 +49,14 @@ #define TI81XX 0xB81E #define DEVICE_ID (CTRL_BASE + 0x0600) #define DEVICE_ID_MASK 0x1FFF +#define PACKAGE_TYPE_SHIFT 16 +#define PACKAGE_TYPE_MASK (3 << 16) + +/* Package Type */ +#define PACKAGE_TYPE_UNDEFINED 0x0 +#define PACKAGE_TYPE_ZCZ 0x1 +#define PACKAGE_TYPE_ZCE 0x2 +#define PACKAGE_TYPE_RESERVED 0x3 /* MPU max frequencies */ #define AM335X_ZCZ_300 0x1FEF diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index dd950e5ac4..3437e6116d 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -61,5 +61,18 @@ /* CPSW Config space */ #define CPSW_BASE 0x4A100000 +/* Control status register */ +#define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) +#define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 +#define CTRL_CRYSTAL_FREQ_SELECTION_MASK (0x3 << 29) +#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT 29 +#define CTRL_SYSBOOT_15_14_MASK (0x3 << 22) +#define CTRL_SYSBOOT_15_14_SHIFT 22 + +#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT 0x0 +#define CTRL_CRYSTAL_FREQ_SRC_EFUSE 0x1 + +#define NUM_CRYSTAL_FREQ 0x4 + int clk_get(int clk); #endif /* __AM33XX_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index a7da6b5cfd..af69ac6f2c 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -85,19 +85,6 @@ #define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8) #define USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) -/* Control status register */ -#define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) -#define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 -#define CTRL_CRYSTAL_FREQ_SELECTION_MASK (0x3 << 29) -#define CTRL_CRYSTAL_FREQ_SELECTION_SHIFT 29 -#define CTRL_SYSBOOT_15_14_MASK (0x3 << 22) -#define CTRL_SYSBOOT_15_14_SHIFT 22 - -#define CTRL_CRYSTAL_FREQ_SRC_SYSBOOT 0x0 -#define CTRL_CRYSTAL_FREQ_SRC_EFUSE 0x1 - -#define NUM_CRYSTAL_FREQ 0x4 - /* EDMA3 Base Address */ #define EDMA3_BASE 0x49000000 diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 903398fe8f..4e78aafb0b 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -46,3 +46,4 @@ int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); void enable_usb_clocks(int index); void disable_usb_clocks(int index); void do_board_detect(void); +u32 get_sys_clk_index(void); diff --git a/arch/arm/include/asm/armv7m.h b/arch/arm/include/asm/armv7m.h index ebf0f17042..af8a97e988 100644 --- a/arch/arm/include/asm/armv7m.h +++ b/arch/arm/include/asm/armv7m.h @@ -70,24 +70,5 @@ struct v7m_mpu { }; #define V7M_MPU ((struct v7m_mpu *)V7M_MPU_BASE) -#define V7M_MPU_CTRL_ENABLE (1 << 0) -#define V7M_MPU_CTRL_HFNMIENA (1 << 1) - -#define V7M_MPU_CTRL_ENABLE (1 << 0) -#define V7M_MPU_CTRL_DISABLE (0 << 0) -#define V7M_MPU_CTRL_HFNMIENA (1 << 1) - -#define V7M_MPU_RASR_EN (1 << 0) -#define V7M_MPU_RASR_SIZE_BITS 1 -#define V7M_MPU_RASR_SIZE_4GB (31 << V7M_MPU_RASR_SIZE_BITS) -#define V7M_MPU_RASR_SIZE_8MB (24 << V7M_MPU_RASR_SIZE_BITS) -#define V7M_MPU_RASR_TEX_SHIFT 19 -#define V7M_MPU_RASR_S_SHIFT 18 -#define V7M_MPU_RASR_C_SHIFT 17 -#define V7M_MPU_RASR_B_SHIFT 16 -#define V7M_MPU_RASR_AP_RW_RW (3 << 24) -#define V7M_MPU_RASR_XN_ENABLE (0 << 28) -#define V7M_MPU_RASR_XN_DISABLE (1 << 28) - #endif /* !defined(__ASSEMBLY__) */ #endif /* ARMV7M_H */ diff --git a/arch/arm/include/asm/armv7m_mpu.h b/arch/arm/include/asm/armv7m_mpu.h new file mode 100644 index 0000000000..d7e99b4d8d --- /dev/null +++ b/arch/arm/include/asm/armv7m_mpu.h @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2017 + * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +enum region_number { + REGION_0 = 0, + REGION_1, + REGION_2, + REGION_3, + REGION_4, + REGION_5, + REGION_6, + REGION_7, +}; + +enum ap { + NO_ACCESS = 0, + PRIV_RW_USR_NO, + PRIV_RW_USR_RO, + PRIV_RW_USR_RW, + UNPREDICTABLE, + PRIV_RO_USR_NO, + PRIV_RO_USR_RO, +}; + +enum mr_attr { + STRONG_ORDER = 0, + SHARED_WRITE_BUFFERED, + O_I_WT_NO_WR_ALLOC, + O_I_WB_NO_WR_ALLOC, + O_I_NON_CACHEABLE, + O_I_WB_RD_WR_ALLOC, + DEVICE_NON_SHARED, +}; +enum size { + REGION_8MB = 22, + REGION_16MB, + REGION_32MB, + REGION_64MB, + REGION_128MB, + REGION_256MB, + REGION_512MB, + REGION_1GB, + REGION_2GB, + REGION_4GB, +}; + +enum xn { + XN_DIS = 0, + XN_EN, +}; + +struct mpu_region_config { + uint32_t start_addr; + enum region_number region_no; + enum xn xn; + enum ap ap; + enum mr_attr mr_attr; + enum size reg_size; +}; + +void disable_mpu(void); +void enable_mpu(void); +void mpu_config(struct mpu_region_config *reg_config); diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 1aab6295d6..3cc0e5fa34 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -32,8 +32,8 @@ struct arch_global_data { #endif /* "static data" needed by most of timer.c on ARM platforms */ unsigned long timer_rate_hz; - unsigned long tbu; - unsigned long tbl; + unsigned int tbu; + unsigned int tbl; unsigned long lastinc; unsigned long long timer_reset_value; #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h index 93e003a368..f6eb51ee3c 100644 --- a/arch/arm/include/asm/omap_mmc.h +++ b/arch/arm/include/asm/omap_mmc.h @@ -25,6 +25,8 @@ #ifndef OMAP_MMC_H_ #define OMAP_MMC_H_ +#include <mmc.h> + struct hsmmc { unsigned char res1[0x10]; unsigned int sysconfig; /* 0x10 */ @@ -49,6 +51,13 @@ struct hsmmc { unsigned int capa; /* 0x140 */ }; +struct omap_hsmmc_plat { + struct mmc_config cfg; + struct hsmmc *base_addr; + struct mmc mmc; + bool cd_inverted; +}; + /* * OMAP HS MMC Bit definitions */ diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 9c3261c884..79bd19af7d 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -180,6 +180,21 @@ static inline unsigned long read_mpidr(void) void __asm_flush_dcache_all(void); void __asm_invalidate_dcache_all(void); void __asm_flush_dcache_range(u64 start, u64 end); + +/** + * __asm_invalidate_dcache_range() - Invalidate a range of virtual addresses + * + * This performance an invalidate from @start to @end - 1. Both addresses + * should be cache-aligned, otherwise this function will align the start + * address and may continue past the end address. + * + * Data in the address range is evicted from the cache and is not written back + * to memory. + * + * @start: Start address to invalidate + * @end: End address to invalidate up to (exclusive) + */ +void __asm_invalidate_dcache_range(u64 start, u64 end); void __asm_invalidate_tlb_all(void); void __asm_invalidate_icache_all(void); int __asm_invalidate_l3_dcache(void); |