diff options
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/omap.h | 13 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap3/omap.h | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap4/omap.h | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 6 |
4 files changed, 19 insertions, 10 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 47962dadf5..3293caaca4 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -15,24 +15,23 @@ #ifndef _OMAP_H_ #define _OMAP_H_ +#include <linux/sizes.h> + #ifdef CONFIG_AM33XX #define NON_SECURE_SRAM_START 0x402F0400 #define NON_SECURE_SRAM_END 0x40310000 -#define SRAM_SCRATCH_SPACE_ADDR 0x4030B800 +#define NON_SECURE_SRAM_IMG_END 0x4030B800 #elif defined(CONFIG_TI81XX) #define NON_SECURE_SRAM_START 0x40300000 #define NON_SECURE_SRAM_END 0x40320000 -#define SRAM_SCRATCH_SPACE_ADDR 0x4031B800 +#define NON_SECURE_SRAM_IMG_END 0x4031B800 #elif defined(CONFIG_AM43XX) #define NON_SECURE_SRAM_START 0x402F0400 #define NON_SECURE_SRAM_END 0x40340000 -#define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 -#define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR -#define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC -#define AM4372_BOARD_VERSION_START SRAM_SCRATCH_SPACE_ADDR + 0xD -#define AM4372_BOARD_VERSION_END SRAM_SCRATCH_SPACE_ADDR + 0x14 +#define NON_SECURE_SRAM_IMG_END 0x40337DE0 #define QSPI_BASE 0x47900000 #endif +#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K) /* Boot parameters */ #ifndef __ASSEMBLY__ diff --git a/arch/arm/include/asm/arch-omap3/omap.h b/arch/arm/include/asm/arch-omap3/omap.h index bc0e02a200..417ff895f1 100644 --- a/arch/arm/include/asm/arch-omap3/omap.h +++ b/arch/arm/include/asm/arch-omap3/omap.h @@ -10,6 +10,8 @@ #ifndef _OMAP3_H_ #define _OMAP3_H_ +#include <linux/sizes.h> + /* Stuff on L3 Interconnect */ #define SMX_APE_BASE 0x68000000 @@ -145,7 +147,8 @@ struct gpio { #define NON_SECURE_SRAM_START 0x40208000 /* Works for GP & EMU */ #define NON_SECURE_SRAM_END 0x40210000 -#define SRAM_SCRATCH_SPACE_ADDR 0x4020E000 +#define NON_SECURE_SRAM_IMG_END 0x4020F000 +#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K) #define LOW_LEVEL_SRAM_STACK 0x4020FFFC diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index 5ccda6ee94..b86a776840 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -19,6 +19,8 @@ #include <asm/types.h> #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ +#include <linux/sizes.h> + /* * L4 Peripherals - L4 Wakeup and L4 Core now */ @@ -109,7 +111,8 @@ struct s32ktimer { */ #define NON_SECURE_SRAM_START 0x40304000 #define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */ -#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000 +#define NON_SECURE_SRAM_IMG_END 0x4030C000 +#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K) /* base address for indirect vectors (internal boot mode) */ #define SRAM_ROM_VECT_BASE 0x4030D000 diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 2fd5cda623..ef8e975245 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -16,6 +16,8 @@ #include <asm/types.h> #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */ +#include <linux/sizes.h> + /* * L4 Peripherals - L4 Wakeup and L4 Core now */ @@ -186,11 +188,13 @@ struct s32ktimer { #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) #define NON_SECURE_SRAM_START 0x40300000 #define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */ +#define NON_SECURE_SRAM_IMG_END 0x4037E000 #else #define NON_SECURE_SRAM_START 0x40300000 #define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */ +#define NON_SECURE_SRAM_IMG_END 0x4031E000 #endif -#define SRAM_SCRATCH_SPACE_ADDR 0x4031E000 +#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K) /* base address for indirect vectors (internal boot mode) */ #define SRAM_ROM_VECT_BASE 0x4031F000 |