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-rw-r--r--arch/arm/mach-bcm283x/Makefile2
-rw-r--r--arch/arm/mach-bcm283x/include/mach/gpio.h5
-rw-r--r--arch/arm/mach-bcm283x/include/mach/msg.h51
-rw-r--r--arch/arm/mach-bcm283x/msg.c154
-rw-r--r--arch/arm/mach-bcm283x/reset.c21
5 files changed, 224 insertions, 9 deletions
diff --git a/arch/arm/mach-bcm283x/Makefile b/arch/arm/mach-bcm283x/Makefile
index 5cb1b2fe94..b5f606ef0b 100644
--- a/arch/arm/mach-bcm283x/Makefile
+++ b/arch/arm/mach-bcm283x/Makefile
@@ -5,4 +5,4 @@
#
obj-$(CONFIG_BCM2835) += lowlevel_init.o
-obj-y += init.o reset.o mbox.o phys2bus.o
+obj-y += init.o reset.o mbox.o msg.o phys2bus.o
diff --git a/arch/arm/mach-bcm283x/include/mach/gpio.h b/arch/arm/mach-bcm283x/include/mach/gpio.h
index b2df75ad3f..daaee52f81 100644
--- a/arch/arm/mach-bcm283x/include/mach/gpio.h
+++ b/arch/arm/mach-bcm283x/include/mach/gpio.h
@@ -9,11 +9,6 @@
#ifndef _BCM2835_GPIO_H_
#define _BCM2835_GPIO_H_
-#ifndef CONFIG_BCM2835
-#define BCM2835_GPIO_BASE 0x3f200000
-#else
-#define BCM2835_GPIO_BASE 0x20200000
-#endif
#define BCM2835_GPIO_COUNT 54
#define BCM2835_GPIO_FSEL_MASK 0x7
diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
new file mode 100644
index 0000000000..478b1f1c50
--- /dev/null
+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2012,2015 Stephen Warren
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _BCM2835_MSG_H
+#define _BCM2835_MSG_H
+
+/**
+ * bcm2835_power_on_module() - power on an SoC module
+ *
+ * @module: ID of module to power on (BCM2835_MBOX_POWER_DEVID_...)
+ * @return 0 if OK, -EIO on error
+ */
+int bcm2835_power_on_module(u32 module);
+
+/**
+ * bcm2835_get_mmc_clock() - get the frequency of the MMC clock
+ *
+ * @return clock frequency, or -ve on error
+ */
+int bcm2835_get_mmc_clock(void);
+
+/**
+ * bcm2835_get_video_size() - get the current display size
+ *
+ * @widthp: Returns the width in pixels
+ * @heightp: Returns the height in pixels
+ * @return 0 if OK, -ve on error
+ */
+int bcm2835_get_video_size(int *widthp, int *heightp);
+
+/**
+ * bcm2835_set_video_params() - set the video parameters
+ *
+ * @widthp: Video width to request (returns the actual width selected)
+ * @heightp: Video height to request (returns the actual height selected)
+ * @depth_bpp: Requested bit depth
+ * @pixel_order: Pixel order to use (BCM2835_MBOX_PIXEL_ORDER_...)
+ * @alpha_mode: Alpha transparency mode to use (BCM2835_MBOX_ALPHA_MODE_...)
+ * @fb_basep: Returns base address of frame buffer
+ * @fb_sizep: Returns size of frame buffer
+ * @pitchp: Returns number of bytes in each frame buffer line
+ * @return 0 if OK, -ve on error
+ */
+int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
+ int pixel_order, int alpha_mode, ulong *fb_basep,
+ ulong *fb_sizep, int *pitchp);
+
+#endif
diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
new file mode 100644
index 0000000000..92e93ad9e5
--- /dev/null
+++ b/arch/arm/mach-bcm283x/msg.c
@@ -0,0 +1,154 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <memalign.h>
+#include <phys2bus.h>
+#include <asm/arch/mbox.h>
+
+struct msg_set_power_state {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_set_power_state set_power_state;
+ u32 end_tag;
+};
+
+struct msg_get_clock_rate {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
+ u32 end_tag;
+};
+
+struct msg_query {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_physical_w_h physical_w_h;
+ u32 end_tag;
+};
+
+struct msg_setup {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_physical_w_h physical_w_h;
+ struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;
+ struct bcm2835_mbox_tag_depth depth;
+ struct bcm2835_mbox_tag_pixel_order pixel_order;
+ struct bcm2835_mbox_tag_alpha_mode alpha_mode;
+ struct bcm2835_mbox_tag_virtual_offset virtual_offset;
+ struct bcm2835_mbox_tag_overscan overscan;
+ struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;
+ struct bcm2835_mbox_tag_pitch pitch;
+ u32 end_tag;
+};
+
+int bcm2835_power_on_module(u32 module)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
+ int ret;
+
+ BCM2835_MBOX_INIT_HDR(msg_pwr);
+ BCM2835_MBOX_INIT_TAG(&msg_pwr->set_power_state,
+ SET_POWER_STATE);
+ msg_pwr->set_power_state.body.req.device_id = module;
+ msg_pwr->set_power_state.body.req.state =
+ BCM2835_MBOX_SET_POWER_STATE_REQ_ON |
+ BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT;
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
+ &msg_pwr->hdr);
+ if (ret) {
+ printf("bcm2835: Could not set module %u power state\n",
+ module);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int bcm2835_get_mmc_clock(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
+ int ret;
+
+ ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
+ if (ret)
+ return ret;
+
+ BCM2835_MBOX_INIT_HDR(msg_clk);
+ BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE);
+ msg_clk->get_clock_rate.body.req.clock_id = BCM2835_MBOX_CLOCK_ID_EMMC;
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
+ if (ret) {
+ printf("bcm2835: Could not query eMMC clock rate\n");
+ return -EIO;
+ }
+
+ return msg_clk->get_clock_rate.body.resp.rate_hz;
+}
+
+int bcm2835_get_video_size(int *widthp, int *heightp)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
+ int ret;
+
+ BCM2835_MBOX_INIT_HDR(msg_query);
+ BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_query->physical_w_h,
+ GET_PHYSICAL_W_H);
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_query->hdr);
+ if (ret) {
+ printf("bcm2835: Could not query display resolution\n");
+ return ret;
+ }
+ *widthp = msg_query->physical_w_h.body.resp.width;
+ *heightp = msg_query->physical_w_h.body.resp.height;
+
+ return 0;
+}
+
+int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
+ int pixel_order, int alpha_mode, ulong *fb_basep,
+ ulong *fb_sizep, int *pitchp)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_setup, msg_setup, 1);
+ int ret;
+
+ BCM2835_MBOX_INIT_HDR(msg_setup);
+ BCM2835_MBOX_INIT_TAG(&msg_setup->physical_w_h, SET_PHYSICAL_W_H);
+ msg_setup->physical_w_h.body.req.width = *widthp;
+ msg_setup->physical_w_h.body.req.height = *heightp;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_w_h, SET_VIRTUAL_W_H);
+ msg_setup->virtual_w_h.body.req.width = *widthp;
+ msg_setup->virtual_w_h.body.req.height = *heightp;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->depth, SET_DEPTH);
+ msg_setup->depth.body.req.bpp = 32;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->pixel_order, SET_PIXEL_ORDER);
+ msg_setup->pixel_order.body.req.order = pixel_order;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->alpha_mode, SET_ALPHA_MODE);
+ msg_setup->alpha_mode.body.req.alpha = alpha_mode;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_offset, SET_VIRTUAL_OFFSET);
+ msg_setup->virtual_offset.body.req.x = 0;
+ msg_setup->virtual_offset.body.req.y = 0;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->overscan, SET_OVERSCAN);
+ msg_setup->overscan.body.req.top = 0;
+ msg_setup->overscan.body.req.bottom = 0;
+ msg_setup->overscan.body.req.left = 0;
+ msg_setup->overscan.body.req.right = 0;
+ BCM2835_MBOX_INIT_TAG(&msg_setup->allocate_buffer, ALLOCATE_BUFFER);
+ msg_setup->allocate_buffer.body.req.alignment = 0x100;
+ BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_setup->pitch, GET_PITCH);
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_setup->hdr);
+ if (ret) {
+ printf("bcm2835: Could not configure display\n");
+ return ret;
+ }
+ *widthp = msg_setup->physical_w_h.body.resp.width;
+ *heightp = msg_setup->physical_w_h.body.resp.height;
+ *pitchp = msg_setup->pitch.body.resp.pitch;
+ *fb_basep = bus_to_phys(
+ msg_setup->allocate_buffer.body.resp.fb_address);
+ *fb_sizep = msg_setup->allocate_buffer.body.resp.fb_size;
+
+ return 0;
+}
diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c
index 685815c46c..b62cb8a51e 100644
--- a/arch/arm/mach-bcm283x/reset.c
+++ b/arch/arm/mach-bcm283x/reset.c
@@ -21,18 +21,33 @@
*/
#define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT 0x555
+/* max ticks timeout */
+#define BCM2835_WDOG_MAX_TIMEOUT 0x000fffff
+
+#ifdef CONFIG_BCM2835_WDT
+extern void hw_watchdog_disable(void);
+#else
+void hw_watchdog_disable(void) {}
+#endif
+
__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
(struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
-void __efi_runtime reset_cpu(ulong addr)
+void __efi_runtime reset_cpu(ulong ticks)
{
- uint32_t rstc;
+ uint32_t rstc, timeout;
+
+ if (ticks == 0) {
+ hw_watchdog_disable();
+ timeout = RESET_TIMEOUT;
+ } else
+ timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
rstc = readl(&wdog_regs->rstc);
rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
- writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, &wdog_regs->wdog);
+ writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
}