diff options
Diffstat (limited to 'arch/arm/mach-imx/mx6')
| -rw-r--r-- | arch/arm/mach-imx/mx6/Kconfig | 11 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mx6/ddr.c | 24 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..aa6f5facbf 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -387,6 +387,16 @@ config TARGET_TBS2910 config TARGET_TITANIUM bool "titanium" +config TARGET_KP_IMX6Q_TPC + bool "K+P KP_IMX6Q_TPC i.MX6 Quad" + select MX6QDL + select BOARD_LATE_INIT + select BOARD_EARLY_INIT_F + select SUPPORT_SPL + select DM + select DM_THERMAL + imply CMD_SPL + config TARGET_TQMA6 bool "TQ Systems TQMa6 board" select BOARD_LATE_INIT @@ -493,6 +503,7 @@ source "board/tbs/tbs2910/Kconfig" source "board/tqc/tqma6/Kconfig" source "board/toradex/apalis_imx6/Kconfig" source "board/toradex/colibri_imx6/Kconfig" +source "board/k+p/kp_imx6q_tpc/Kconfig" source "board/udoo/Kconfig" source "board/udoo/neo/Kconfig" source "board/wandboard/Kconfig" diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index 43b77cfa41..6e5e40dd1a 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -85,6 +85,23 @@ static void modify_dg_result(u32 *reg_st0, u32 *reg_st1, u32 *reg_ctrl) writel(val_ctrl, reg_ctrl); } +static void correct_mpwldectr_result(void *reg) +{ + /* Limit is 200/256 of CK, which is WL_HC_DELx | 0x48. */ + const unsigned int limit = 0x148; + u32 val = readl(reg); + u32 old = val; + + if ((val & 0x17f) > limit) + val &= 0xffff << 16; + + if (((val >> 16) & 0x17f) > limit) + val &= 0xffff; + + if (old != val) + writel(val, reg); +} + int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) { struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; @@ -176,6 +193,13 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo) errors |= 4; } + correct_mpwldectr_result(&mmdc0->mpwldectrl0); + correct_mpwldectr_result(&mmdc0->mpwldectrl1); + if (sysinfo->dsize == 2) { + correct_mpwldectr_result(&mmdc1->mpwldectrl0); + correct_mpwldectr_result(&mmdc1->mpwldectrl1); + } + /* * User should issue MRS command to exit write leveling mode * through Load Mode Register command |