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Diffstat (limited to 'arch/arm/mach-k3/am6_init.c')
-rw-r--r--arch/arm/mach-k3/am6_init.c80
1 files changed, 68 insertions, 12 deletions
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 516a02e8a8..603834e507 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <fdt_support.h>
#include <init.h>
#include <asm/io.h>
#include <spl.h>
@@ -18,7 +19,11 @@
#include <dm/uclass-internal.h>
#include <dm/pinctrl.h>
#include <linux/soc/ti/ti_sci_protocol.h>
+#include <log.h>
#include <mmc.h>
+#include <stdlib.h>
+
+DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_K3_LOAD_SYSFW
@@ -41,16 +46,6 @@ struct fwl_data main_cbass_fwls[] = {
#endif
#endif
-static void mmr_unlock(u32 base, u32 partition)
-{
- /* Translate the base address */
- phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE;
-
- /* Unlock the requested partition if locked using two-step sequence */
- writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0);
- writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1);
-}
-
static void ctrl_mmr_unlock(void)
{
/* Unlock all WKUP_CTRL_MMR0 module registers */
@@ -88,7 +83,7 @@ static void store_boot_index_from_rom(void)
bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
}
-#if defined(CONFIG_K3_LOAD_SYSFW)
+#if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
void k3_mmc_stop_clock(void)
{
if (spl_boot_device() == BOOT_DEVICE_MMC1) {
@@ -113,12 +108,54 @@ void k3_mmc_restart_clock(void)
mmc_set_clock(mmc, mmc->saved_clock, false);
}
}
+#else
+void k3_mmc_stop_clock(void) {}
+void k3_mmc_restart_clock(void) {}
#endif
+#if CONFIG_IS_ENABLED(DFU) || CONFIG_IS_ENABLED(USB_STORAGE)
+#define CTRLMMR_SERDES0_CTRL 0x00104080
+#define PCIE_LANE0 0x1
+static int fixup_usb_boot(void)
+{
+ int ret;
+
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_USB:
+ /*
+ * If bootmode is Host bootmode, fixup the dr_mode to host
+ * before the dwc3 bind takes place
+ */
+ ret = fdt_find_and_setprop((void *)gd->fdt_blob,
+ "/interconnect@100000/dwc3@4000000/usb@10000",
+ "dr_mode", "host", 11, 0);
+ if (ret)
+ printf("%s: fdt_find_and_setprop() failed:%d\n", __func__,
+ ret);
+ fallthrough;
+ case BOOT_DEVICE_DFU:
+ /*
+ * The serdes mux between PCIe and USB3 needs to be set to PCIe for
+ * accessing the interface at USB 2.0
+ */
+ writel(PCIE_LANE0, CTRLMMR_SERDES0_CTRL);
+ default:
+ break;
+ }
+
+ return 0;
+}
+int fdtdec_board_setup(const void *fdt_blob)
+{
+ return fixup_usb_boot();
+}
+#endif
void board_init_f(ulong dummy)
{
#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM654_DDRSS)
struct udevice *dev;
+ size_t pool_size;
+ void *pool_addr;
int ret;
#endif
/*
@@ -150,6 +187,20 @@ void board_init_f(ulong dummy)
#ifdef CONFIG_K3_LOAD_SYSFW
/*
+ * Initialize an early full malloc environment. Do so by allocating a
+ * new malloc area inside the currently active pre-relocation "first"
+ * malloc pool of which we use all that's left.
+ */
+ pool_size = CONFIG_VAL(SYS_MALLOC_F_LEN) - gd->malloc_ptr;
+ pool_addr = malloc(pool_size);
+ if (!pool_addr)
+ panic("ERROR: Can't allocate full malloc pool!\n");
+
+ mem_malloc_init((ulong)pool_addr, (ulong)pool_size);
+ gd->flags |= GD_FLG_FULL_MALLOC_INIT;
+ debug("%s: initialized an early full malloc pool at 0x%08lx of 0x%lx bytes\n",
+ __func__, (unsigned long)pool_addr, (unsigned long)pool_size);
+ /*
* Process pinctrl for the serial0 a.k.a. WKUP_UART0 module and continue
* regardless of the result of pinctrl. Do this without probing the
* device, but instead by searching the device that would request the
@@ -165,7 +216,7 @@ void board_init_f(ulong dummy)
* Load, start up, and configure system controller firmware while
* also populating the SYSFW post-PM configuration callback hook.
*/
- k3_sysfw_loader(k3_mmc_stop_clock, k3_mmc_restart_clock);
+ k3_sysfw_loader(false, k3_mmc_stop_clock, k3_mmc_restart_clock);
/* Prepare console output */
preloader_console_init();
@@ -272,6 +323,11 @@ static u32 __get_primary_bootmedia(u32 devstat)
CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT;
if (port == 0x1)
bootmode = BOOT_DEVICE_MMC2;
+ } else if (bootmode == BOOT_DEVICE_DFU) {
+ u32 mode = (devstat & CTRLMMR_MAIN_DEVSTAT_USB_MODE_MASK) >>
+ CTRLMMR_MAIN_DEVSTAT_USB_MODE_SHIFT;
+ if (mode == 0x2)
+ bootmode = BOOT_DEVICE_USB;
}
return bootmode;