diff options
Diffstat (limited to 'arch/arm/mach-mvebu')
| -rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 10 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/arm64-common.c | 37 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/armada8k/cpu.c | 18 |
3 files changed, 53 insertions, 12 deletions
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 7733936be5..40476dc421 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -83,8 +83,8 @@ config TARGET_DB_88F6820_AMC bool "Support DB-88F6820-AMC" select 88F6820 -config TARGET_MVEBU_DB_88F7040 - bool "Support DB-88F7040 Armada 7040" +config TARGET_MVEBU_ARMADA_8K + bool "Support Armada 7k/8k platforms" select ARMADA_8K config TARGET_DB_MV784MP_GP @@ -111,7 +111,7 @@ config SYS_BOARD default "db-88f6720" if TARGET_DB_88F6720 default "db-88f6820-gp" if TARGET_DB_88F6820_GP default "db-88f6820-amc" if TARGET_DB_88F6820_AMC - default "mvebu_db-88f7040" if TARGET_MVEBU_DB_88F7040 + default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP default "ds414" if TARGET_DS414 default "maxbcm" if TARGET_MAXBCM @@ -123,7 +123,7 @@ config SYS_CONFIG_NAME default "db-88f6720" if TARGET_DB_88F6720 default "db-88f6820-gp" if TARGET_DB_88F6820_GP default "db-88f6820-amc" if TARGET_DB_88F6820_AMC - default "mvebu_db-88f7040" if TARGET_MVEBU_DB_88F7040 + default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP default "ds414" if TARGET_DS414 default "maxbcm" if TARGET_MAXBCM @@ -135,7 +135,7 @@ config SYS_VENDOR default "Marvell" if TARGET_DB_88F6720 default "Marvell" if TARGET_DB_88F6820_GP default "Marvell" if TARGET_DB_88F6820_AMC - default "Marvell" if TARGET_MVEBU_DB_88F7040 + default "Marvell" if TARGET_MVEBU_ARMADA_8K default "solidrun" if TARGET_CLEARFOG default "Synology" if TARGET_DS414 diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 7055a81de3..8f026559c2 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -17,6 +17,23 @@ DECLARE_GLOBAL_DATA_PTR; /* + * Not all memory is mapped in the MMU. So we need to restrict the + * memory size so that U-Boot does not try to access it. Also, the + * internal registers are located at 0xf000.0000 - 0xffff.ffff. + * Currently only 2GiB are mapped for system memory. This is what + * we pass to the U-Boot subsystem here. + */ +#define USABLE_RAM_SIZE 0x80000000 + +ulong board_get_usable_ram_top(ulong total_size) +{ + if (gd->ram_size > USABLE_RAM_SIZE) + return USABLE_RAM_SIZE; + + return gd->ram_size; +} + +/* * On ARMv8, MBus is not configured in U-Boot. To enable compilation * of the already implemented drivers, lets add a dummy version of * this function so that linking does not fail. @@ -109,12 +126,20 @@ int arch_early_init_r(void) { struct udevice *dev; int ret; - - /* Call the comphy code via the MISC uclass driver */ - ret = uclass_get_device(UCLASS_MISC, 0, &dev); - if (ret) { - debug("COMPHY init failed: %d\n", ret); - return -ENODEV; + int i; + + /* + * Loop over all MISC uclass drivers to call the comphy code + * and init all CP110 devices enabled in the DT + */ + i = 0; + while (1) { + /* Call the comphy code via the MISC uclass driver */ + ret = uclass_get_device(UCLASS_MISC, i++, &dev); + + /* We're done, once no further CP110 device is found */ + if (ret) + break; } /* Cause the SATA device to do its early init */ diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c index 036430c46c..2719d68e07 100644 --- a/arch/arm/mach-mvebu/armada8k/cpu.c +++ b/arch/arm/mach-mvebu/armada8k/cpu.c @@ -39,7 +39,7 @@ static struct mm_region mvebu_mem_map[] = { PTE_BLOCK_NON_SHARE }, { - /* SRAM, MMIO regions - CP110 region */ + /* SRAM, MMIO regions - CP110 master region */ .phys = 0xf2000000UL, .virt = 0xf2000000UL, .size = 0x02000000UL, /* 32MiB internal registers */ @@ -47,6 +47,22 @@ static struct mm_region mvebu_mem_map[] = { PTE_BLOCK_NON_SHARE }, { + /* SRAM, MMIO regions - CP110 slave region */ + .phys = 0xf4000000UL, + .virt = 0xf4000000UL, + .size = 0x02000000UL, /* 32MiB internal registers */ + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, + { + /* PCI regions */ + .phys = 0xf8000000UL, + .virt = 0xf8000000UL, + .size = 0x08000000UL, /* 128MiB PCI space (master & slave) */ + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, + { /* List terminator */ 0, } |