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-rw-r--r--arch/arm/mach-omap2/am33xx/board.c24
-rw-r--r--arch/arm/mach-omap2/am33xx/clk_synthesizer.c56
-rw-r--r--arch/arm/mach-omap2/clocks-common.c2
-rw-r--r--arch/arm/mach-omap2/hwinit-common.c23
4 files changed, 89 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index f5f2bd5308..2fc364d112 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -19,6 +19,7 @@
#include <asm/arch/ddr_defs.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
+#include <asm/arch/i2c.h>
#include <asm/arch/mem.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
@@ -93,6 +94,20 @@ U_BOOT_DEVICES(am33xx_uarts) = {
# endif
};
+#ifdef CONFIG_DM_I2C
+static const struct omap_i2c_platdata am33xx_i2c[] = {
+ { I2C_BASE1, 100000, OMAP_I2C_REV_V2},
+ { I2C_BASE2, 100000, OMAP_I2C_REV_V2},
+ { I2C_BASE3, 100000, OMAP_I2C_REV_V2},
+};
+
+U_BOOT_DEVICES(am33xx_i2c) = {
+ { "i2c_omap", &am33xx_i2c[0] },
+ { "i2c_omap", &am33xx_i2c[1] },
+ { "i2c_omap", &am33xx_i2c[2] },
+};
+#endif
+
#ifdef CONFIG_DM_GPIO
static const struct omap_gpio_platdata am33xx_gpio[] = {
{ 0, AM33XX_GPIO0_BASE },
@@ -457,12 +472,15 @@ void early_system_init(void)
#ifdef CONFIG_DEBUG_UART_OMAP
debug_uart_init();
#endif
-#ifdef CONFIG_TI_I2C_BOARD_DETECT
- do_board_detect();
-#endif
+
#ifdef CONFIG_SPL_BUILD
spl_early_init();
#endif
+
+#ifdef CONFIG_TI_I2C_BOARD_DETECT
+ do_board_detect();
+#endif
+
#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
/* Enable RTC32K clock */
rtc32k_enable();
diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
index 0e7ad1d3af..ff1bfaf84b 100644
--- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
+++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
@@ -14,6 +14,7 @@
/**
* clk_synthesizer_reg_read - Read register from synthesizer.
+ * dev: i2c bus device (not used if CONFIG_DM_I2C is not set)
* @addr: addr within the i2c device
* buf: Buffer to which value is to be read.
*
@@ -21,13 +22,14 @@
* be send along with enabling byte read more, and then read can happen.
* Returns 0 on success
*/
-static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
+static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
{
int rc;
/* Enable Bye read */
addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
+#ifndef CONFIG_DM_I2C
/* Send the command byte */
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
if (rc)
@@ -35,26 +37,46 @@ static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
/* Read the Data */
return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
+#else
+ /* Send the command byte */
+ rc = dm_i2c_reg_write(dev, addr, *buf);
+ if (rc)
+ printf("Failed to send command to clock synthesizer\n");
+
+ /* Read the Data */
+ rc = dm_i2c_reg_read(dev, addr);
+ if (rc < 0)
+ return rc;
+
+ *buf = (u8)rc;
+ return 0;
+#endif
+
}
/**
* clk_synthesizer_reg_write - Write a value to register in synthesizer.
+ * dev: i2c bus device (not used if CONFIG_DM_I2C is not set)
* @addr: addr within the i2c device
* val: Value to be written in the addr.
*
* Enable the byte read mode in the address and start the i2c transfer.
* Returns 0 on success
*/
-static int clk_synthesizer_reg_write(int addr, uint8_t val)
+static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
{
- uint8_t cmd[2];
+ u8 cmd[2];
int rc = 0;
/* Enable byte write */
cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
cmd[1] = val;
+#ifndef CONFIG_DM_I2C
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
+#else
+ rc = dm_i2c_write(dev, addr, cmd, 2);
+#endif
if (rc)
printf("Clock synthesizer reg write failed at addr = 0x%x\n",
addr);
@@ -72,30 +94,42 @@ static int clk_synthesizer_reg_write(int addr, uint8_t val)
int setup_clock_synthesizer(struct clk_synth *data)
{
int rc;
- uint8_t val;
-
+ u8 val = 0;
+ struct udevice *dev = NULL;
+#ifndef CONFIG_DM_I2C
rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
if (rc) {
printf("i2c probe failed at address 0x%x\n",
CLK_SYNTHESIZER_I2C_ADDR);
return rc;
}
-
- rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
+#else
+ rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
+ if (rc) {
+ printf("failed to get device for synthesizer at address 0x%x\n",
+ CLK_SYNTHESIZER_I2C_ADDR);
+ return rc;
+ }
+#endif
+ rc = clk_synthesizer_reg_read(dev, CLK_SYNTHESIZER_ID_REG, &val);
if (val != data->id)
return rc;
/* Crystal Load capacitor selection */
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_XCSEL,
+ data->capacitor);
if (rc)
return rc;
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_MUX_REG,
+ data->mux);
if (rc)
return rc;
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV2_REG,
+ data->pdiv2);
if (rc)
return rc;
- rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
+ rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV3_REG,
+ data->pdiv3);
if (rc)
return rc;
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 790548ee79..5932d694d3 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -909,6 +909,7 @@ void prcm_init(void)
enable_basic_uboot_clocks();
}
+#if !defined(CONFIG_DM_I2C)
void gpi2c_init(void)
{
static int gpi2c = 1;
@@ -919,3 +920,4 @@ void gpi2c_init(void)
gpi2c = 0;
}
}
+#endif
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index 1a24acb748..772b4c4db5 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -12,6 +12,7 @@
*/
#include <common.h>
#include <debug_uart.h>
+#include <fdtdec.h>
#include <spl.h>
#include <asm/arch/sys_proto.h>
#include <linux/sizes.h>
@@ -19,6 +20,7 @@
#include <asm/omap_common.h>
#include <linux/compiler.h>
#include <asm/system.h>
+#include <dm/root.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -171,6 +173,10 @@ void __weak init_package_revision(void)
*/
void early_system_init(void)
{
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
+ int ret;
+ int rescan;
+#endif
init_omap_revision();
hw_data_init();
init_package_revision();
@@ -186,6 +192,7 @@ void early_system_init(void)
do_io_settings();
#endif
setup_early_clocks();
+
#ifdef CONFIG_SPL_BUILD
/*
* Save the boot parameters passed from romcode.
@@ -193,11 +200,23 @@ void early_system_init(void)
* to prevent overwrites.
*/
save_omap_boot_params();
+ spl_early_init();
#endif
do_board_detect();
-#ifdef CONFIG_SPL_BUILD
- spl_early_init();
+
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
+ /*
+ * Board detection has been done.
+ * Let us see if another dtb wouldn't be a better match
+ * for our board
+ */
+ ret = fdtdec_resetup(&rescan);
+ if (!ret && rescan) {
+ dm_uninit();
+ dm_init_and_scan(true);
+ }
#endif
+
vcores_init();
#ifdef CONFIG_DEBUG_UART_OMAP
debug_uart_init();
generated by cgit (git 2.34.1) at 2025-01-29 23:12:28 +0000