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Diffstat (limited to 'arch/arm/mach-rockchip/rk3288')
-rw-r--r--arch/arm/mach-rockchip/rk3288/Kconfig2
-rw-r--r--arch/arm/mach-rockchip/rk3288/clk_rk3288.c4
-rw-r--r--arch/arm/mach-rockchip/rk3288/rk3288.c21
-rw-r--r--arch/arm/mach-rockchip/rk3288/syscon_rk3288.c2
4 files changed, 22 insertions, 7 deletions
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index bce8023881..50680ce606 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -148,7 +148,7 @@ config ROCKCHIP_FAST_SPL
and have the required PMIC code.
config SYS_SOC
- default "rockchip"
+ default "rk3288"
config SYS_MALLOC_F_LEN
default 0x0800
diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
index 6ca2271869..e64ee86f08 100644
--- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
@@ -7,8 +7,8 @@
#include <common.h>
#include <dm.h>
#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru_rk3288.h>
int rockchip_get_clk(struct udevice **devp)
{
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index a725abc5a5..7941ca68a6 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,16 +3,31 @@
* Copyright (c) 2016 Rockchip Electronics Co., Ltd
*/
#include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/grf_rk3288.h>
-#define GRF_SOC_CON2 0xff77024c
+#define GRF_BASE 0xff770000
int arch_cpu_init(void)
{
/* We do some SoC one time setting here. */
+ struct rk3288_grf * const grf = (void *)GRF_BASE;
/* Use rkpwm by default */
- rk_setreg(GRF_SOC_CON2, 1 << 0);
+ rk_setreg(&grf->soc_con2, 1 << 0);
return 0;
}
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+ /* Enable early UART on the RK3288 */
+ struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+ rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+ GPIO7C6_MASK << GPIO7C6_SHIFT,
+ GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+ GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
index 3bc80281c7..dff2caa598 100644
--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <dm.h>
#include <syscon.h>
-#include <asm/arch/clock.h>
+#include <asm/arch-rockchip/clock.h>
static const struct udevice_id rk3288_syscon_ids[] = {
{ .compatible = "rockchip,rk3288-noc", .data = ROCKCHIP_SYSCON_NOC },