diff options
Diffstat (limited to 'arch/arm/mach-rockchip')
| -rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3188-board-spl.c | 28 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3188-board-tpl.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3188-board.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3188/Kconfig | 14 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3188/sdram_rk3188.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3288/Kconfig | 101 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3399-board-spl.c | 103 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3399/rk3399.c | 1 |
9 files changed, 218 insertions, 56 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index bf8e6be410..af0796d1d0 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -54,6 +54,7 @@ config ROCKCHIP_RK3399 select SUPPORT_SPL select SPL select SPL_SEPARATE_BSS + select ENABLE_ARM_SOC_BOOT0_HOOK help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index f93feae0c9..c3e174db9e 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <clk.h> #include <common.h> #include <debug_uart.h> #include <dm.h> @@ -76,6 +77,27 @@ u32 spl_boot_mode(const u32 boot_device) return MMCSD_MODE_RAW; } +static int setup_arm_clock(void) +{ + struct udevice *dev; + struct clk clk; + int ret; + + ret = rockchip_get_clk(&dev); + if (ret) + return ret; + + clk.id = CLK_ARM; + ret = clk_request(dev, &clk); + if (ret < 0) + return ret; + + ret = clk_set_rate(&clk, 600000000); + + clk_free(&clk); + return ret; +} + void board_init_f(ulong dummy) { struct udevice *pinctrl, *dev; @@ -109,9 +131,9 @@ void board_init_f(ulong dummy) printch('\n'); #endif - ret = spl_init(); + ret = spl_early_init(); if (ret) { - debug("spl_init() failed: %d\n", ret); + debug("spl_early_init() failed: %d\n", ret); hang(); } @@ -144,6 +166,8 @@ void board_init_f(ulong dummy) return; } + setup_arm_clock(); + #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif diff --git a/arch/arm/mach-rockchip/rk3188-board-tpl.c b/arch/arm/mach-rockchip/rk3188-board-tpl.c index 442bfe7aa7..b458ef6ea8 100644 --- a/arch/arm/mach-rockchip/rk3188-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3188-board-tpl.c @@ -17,7 +17,7 @@ DECLARE_GLOBAL_DATA_PTR; static int rk3188_num_entries __attribute__ ((section(".data"))); #define PMU_BASE 0x20004000 -#define TPL_ENTRY 0x10080C00 +#define SPL_ENTRY 0x10080C00 static void jump_to_spl(void) { @@ -25,9 +25,9 @@ static void jump_to_spl(void) struct rk3188_pmu * const pmu = (void *)PMU_BASE; image_entry_noargs_t tpl_entry = - (image_entry_noargs_t)(unsigned long)TPL_ENTRY; + (image_entry_noargs_t)(unsigned long)SPL_ENTRY; - /* Store the SAVE_SP_ADDR in a location shared with TPL. */ + /* Store the SAVE_SP_ADDR in a location shared with SPL. */ writel(SAVE_SP_ADDR, &pmu->sys_reg[2]); tpl_entry(); } diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c index 16f38559af..c370156e4c 100644 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ b/arch/arm/mach-rockchip/rk3188-board.c @@ -56,8 +56,22 @@ err: int dram_init(void) { - /* FIXME: read back ram size from sys_reg2 */ - gd->ram_size = 0x40000000; + struct ram_info ram; + struct udevice *dev; + int ret; + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + return ret; + } + ret = ram_get_info(dev, &ram); + if (ret) { + debug("Cannot get DRAM size: %d\n", ret); + return ret; + } + debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size); + gd->ram_size = ram.size; return 0; } diff --git a/arch/arm/mach-rockchip/rk3188/Kconfig b/arch/arm/mach-rockchip/rk3188/Kconfig index f8e1d0316b..d129fcda99 100644 --- a/arch/arm/mach-rockchip/rk3188/Kconfig +++ b/arch/arm/mach-rockchip/rk3188/Kconfig @@ -1,5 +1,14 @@ if ROCKCHIP_RK3188 +config TARGET_ROCK + bool "Radxa Rock" + help + Rock is a RK3188-based development board with 2 USB and 1 otg + ports, HDMI, TV-out, micro-SD card, audio, WiFi and 100MBit + Ethernet, It also includes on-board nand and 1GB of SDRAM. + Expansion connectors provide access to display pins, I2C, SPI, + UART and GPIOs. + config SYS_SOC default "rockchip" @@ -18,7 +27,12 @@ config SPL_SERIAL_SUPPORT config TPL_LIBCOMMON_SUPPORT default y +config TPL_LIBGENERIC_SUPPORT + default y + config TPL_SERIAL_SUPPORT default y +source "board/radxa/rock/Kconfig" + endif diff --git a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c b/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c index 461cfcdc83..fea8007265 100644 --- a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c @@ -955,7 +955,7 @@ static int rk3188_dmc_probe(struct udevice *dev) if (ret) return ret; #endif - priv->info.base = 0; + priv->info.base = CONFIG_SYS_SDRAM_BASE; priv->info.size = sdram_size_mb(priv->pmu) << 20; return 0; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 738a20d07c..8e7355ece4 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -1,13 +1,34 @@ if ROCKCHIP_RK3288 -config TARGET_FIREFLY_RK3288 - bool "Firefly-RK3288" +config TARGET_CHROMEBOOK_JERRY + bool "Google/Rockchip Veyron-Jerry Chromebook" select BOARD_LATE_INIT help - Firefly is a RK3288-based development board with 2 USB ports, - HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It - also includes on-board eMMC and 1GB of SDRAM. Expansion connectors - provide access to display pins, I2C, SPI, UART and GPIOs. + Jerry is a RK3288-based clamshell device with 2 USB 3.0 ports, + HDMI, an 11.9 inch EDP display, micro-SD card, touchpad and + WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to + the keyboard and battery functions. + +config TARGET_CHROMEBIT_MICKEY + bool "Google/Rockchip Veyron-Mickey Chromebit" + select BOARD_LATE_INIT + help + Mickey is a small RK3288-based device with one USB 3.0 port, HDMI + and WiFi. It has a separate power port and is designed to connect + to the HDMI input of a monitor or TV. It has no internal battery. + Typically a USB hub or wireless keyboard/touchpad is used to get + keyboard and mouse access. + +config TARGET_CHROMEBOOK_MINNIE + bool "Google/Rockchip Veyron-Minnie Chromebook" + select BOARD_LATE_INIT + help + Minnie is a RK3288-based convertible clamshell device with 2 USB 3.0 + ports, micro HDMI, a 10.1-inch 1280x800 EDP display, micro-SD card, + HD camera, touchpad, WiFi and Bluetooth. It includes a Chrome OS + EC (Cortex-M3) to provide access to the keyboard and battery + functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of + internal MMC. The product name is ASUS Chromebook Flip. config TARGET_EVB_RK3288 bool "Evb-RK3288" @@ -27,6 +48,24 @@ config TARGET_FENNEC_RK3288 includes on-board eMMC and 2GB of SDRAM. Expansion connectors provide access to display pins, I2C, SPI, UART and GPIOs. +config TARGET_FIREFLY_RK3288 + bool "Firefly-RK3288" + select BOARD_LATE_INIT + help + Firefly is a RK3288-based development board with 2 USB ports, + HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It + also includes on-board eMMC and 1GB of SDRAM. Expansion connectors + provide access to display pins, I2C, SPI, UART and GPIOs. + +config TARGET_MIQI_RK3288 + bool "MiQi-RK3288" + select BOARD_LATE_INIT + help + MiQi-RK3288 is a RK3288-based development board with 4 USB 2.0 + ports, HDMI, micro-SD card, 16 GB eMMC and Gigabit Ethernet. It + has 1 or 2 GiB SDRAM. Expansion connectors provide access to + I2C, SPI, UART, GPIOs and fan control. + config TARGET_POPMETAL_RK3288 bool "PopMetal-RK3288" select BOARD_LATE_INIT @@ -37,45 +76,6 @@ config TARGET_POPMETAL_RK3288 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART, GPIOs and display interface. -config TARGET_TINKER_RK3288 - bool "Tinker-RK3288" - select BOARD_LATE_INIT - help - Tinker is a RK3288-based development board with 2 USB ports, HDMI, - micro-SD card, audio, Gigabit Ethernet. It also includes on-board - 8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to - I2C, SPI, UART, GPIOs. - -config TARGET_CHROMEBOOK_JERRY - bool "Google/Rockchip Veyron-Jerry Chromebook" - select BOARD_LATE_INIT - help - Jerry is a RK3288-based clamshell device with 2 USB 3.0 ports, - HDMI, an 11.9 inch EDP display, micro-SD card, touchpad and - WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to - the keyboard and battery functions. - -config TARGET_CHROMEBIT_MICKEY - bool "Google/Rockchip Veyron-Mickey Chromebit" - select BOARD_LATE_INIT - help - Mickey is a small RK3288-based device with one USB 3.0 port, HDMI - and WiFi. It has a separate power port and is designed to connect - to the HDMI input of a monitor or TV. It has no internal battery. - Typically a USB hub or wireless keyboard/touchpad is used to get - keyboard and mouse access. - -config TARGET_CHROMEBOOK_MINNIE - bool "Google/Rockchip Veyron-Minnie Chromebook" - select BOARD_LATE_INIT - help - Minnie is a RK3288-based convertible clamshell device with 2 USB 3.0 - ports, micro HDMI, a 10.1-inch 1280x800 EDP display, micro-SD card, - HD camera, touchpad, WiFi and Bluetooth. It includes a Chrome OS - EC (Cortex-M3) to provide access to the keyboard and battery - functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of - internal MMC. The product name is ASUS Chromebook Flip. - config TARGET_ROCK2 bool "Radxa Rock 2" select BOARD_LATE_INIT @@ -85,6 +85,15 @@ config TARGET_ROCK2 space for a real-time-clock battery. There is also an expansion interface which provides access to many pins. +config TARGET_TINKER_RK3288 + bool "Tinker-RK3288" + select BOARD_LATE_INIT + help + Tinker is a RK3288-based development board with 2 USB ports, HDMI, + micro-SD card, audio, Gigabit Ethernet. It also includes on-board + 8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to + I2C, SPI, UART, GPIOs. + config ROCKCHIP_FAST_SPL bool "Change the CPU to full speed in SPL" depends on TARGET_CHROMEBOOK_JERRY @@ -118,6 +127,8 @@ source "board/firefly/firefly-rk3288/Kconfig" source "board/google/veyron/Kconfig" +source "board/mqmaker/miqi_rk3288/Kconfig" + source "board/radxa/rock2/Kconfig" source "board/rockchip/evb_rk3288/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 8ae305542b..4f84ec10a5 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -10,6 +10,7 @@ #include <fdtdec.h> #include <led.h> #include <malloc.h> +#include <mmc.h> #include <ram.h> #include <spl.h> #include <asm/gpio.h> @@ -27,6 +28,104 @@ DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL) +static int spl_node_to_boot_device(int node) +{ + struct udevice *parent; + + /* + * This should eventually move into the SPL code, once SPL becomes + * aware of the block-device layer. Until then (and to avoid unneeded + * delays in getting this feature out, it lives at the board-level). + */ + if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) { + struct udevice *dev; + struct blk_desc *desc = NULL; + + for (device_find_first_child(parent, &dev); + dev; + device_find_next_child(&dev)) { + if (device_get_uclass_id(dev) == UCLASS_BLK) { + desc = dev_get_uclass_platdata(dev); + break; + } + } + + if (!desc) + return -ENOENT; + + switch (desc->devnum) { + case 0: + return BOOT_DEVICE_MMC1; + case 1: + return BOOT_DEVICE_MMC2; + default: + return -ENOSYS; + } + } + + /* + * SPL doesn't differentiate SPI flashes, so we keep the detection + * brief and inaccurate... hopefully, the common SPL layer can be + * extended with awareness of the BLK layer (and matching OF_CONTROL) + * soon. + */ + if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent)) + return BOOT_DEVICE_SPI; + + return -1; +} + +void board_boot_order(u32 *spl_boot_list) +{ + const void *blob = gd->fdt_blob; + int chosen_node = fdt_path_offset(blob, "/chosen"); + int idx = 0; + int elem; + int boot_device; + int node; + const char *conf; + + if (chosen_node < 0) { + debug("%s: /chosen not found, using spl_boot_device()\n", + __func__); + spl_boot_list[0] = spl_boot_device(); + return; + } + + for (elem = 0; + (conf = fdt_stringlist_get(blob, chosen_node, + "u-boot,spl-boot-order", elem, NULL)); + elem++) { + /* First check if the list element is an alias */ + const char *alias = fdt_get_alias(blob, conf); + if (alias) + conf = alias; + + /* Try to resolve the config item (or alias) as a path */ + node = fdt_path_offset(blob, conf); + if (node < 0) { + debug("%s: could not find %s in FDT", __func__, conf); + continue; + } + + /* Try to map this back onto SPL boot devices */ + boot_device = spl_node_to_boot_device(node); + if (boot_device < 0) { + debug("%s: could not map node @%x to a boot-device\n", + __func__, node); + continue; + } + + spl_boot_list[idx++] = boot_device; + } + + /* If we had no matches, fall back to spl_boot_device */ + if (idx == 0) + spl_boot_list[0] = spl_boot_device(); +} +#endif + u32 spl_boot_device(void) { return BOOT_DEVICE_MMC1; @@ -96,9 +195,9 @@ void board_init_f(ulong dummy) /* Emmc clock generator: disable the clock multipilier */ rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff); - ret = spl_init(); + ret = spl_early_init(); if (ret) { - debug("spl_init() failed: %d\n", ret); + debug("spl_early_init() failed: %d\n", ret); hang(); } diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index cbfd3fa09a..8bb950ebd1 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -40,6 +40,5 @@ int arch_cpu_init(void) /* Emmc clock generator: disable the clock multipilier */ rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff); - printf("time %x, %x\n", readl(0xff8680a8), readl(0xff8680ac)); return 0; } |