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-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager.h2
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h7
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h7
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_s10.h1
-rw-r--r--arch/arm/mach-socfpga/include/mach/firewall.h2
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h1
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h1
-rw-r--r--arch/arm/mach-socfpga/include/mach/mailbox_s10.h1
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h1
-rw-r--r--arch/arm/mach-socfpga/include/mach/sdram_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager.h1
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_soc64.h1
12 files changed, 22 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index c6830582a5..1f734bcd65 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -8,7 +8,7 @@
phys_addr_t socfpga_get_clkmgr_addr(void);
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
void cm_wait_for_lock(u32 mask);
int cm_wait_for_fsm(void);
void cm_print_clock_quick_summary(void);
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
index 23f280df1b..11ddee5cb6 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
@@ -6,7 +6,9 @@
#ifndef CLOCK_MANAGER_ARRIA10
#define CLOCK_MANAGER_ARRIA10
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
/* Clock manager group */
#define CLKMGR_A10_CTRL 0x00
@@ -64,12 +66,13 @@
int cm_basic_init(const void *blob);
#endif
+#include <linux/bitops.h>
unsigned int cm_get_l4_sp_clk_hz(void);
unsigned long cm_get_mpu_clk_hz(void);
unsigned int cm_get_qspi_controller_clk_hz(void);
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
#define LOCKED_MASK (CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \
CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK)
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
index 08655094ca..5c9abe619b 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
@@ -6,7 +6,9 @@
#ifndef _CLOCK_MANAGER_GEN5_H_
#define _CLOCK_MANAGER_GEN5_H_
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
struct cm_config {
/* main group */
@@ -107,8 +109,9 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
/* Clock configuration accessors */
int cm_basic_init(const struct cm_config * const cfg);
const struct cm_config * const cm_get_default_config(void);
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
+#include <linux/bitops.h>
#define LOCKED_MASK \
(CLKMGR_INTER_SDRPLLLOCKED_MASK | \
CLKMGR_INTER_PERPLLLOCKED_MASK | \
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
index 9d2b3babab..cb7923baef 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
@@ -8,6 +8,7 @@
#define _CLOCK_MANAGER_S10_
#include <asm/arch/clock_manager_soc64.h>
+#include <linux/bitops.h>
/* Clock speed accessors */
unsigned long cm_get_mpu_clk_hz(void);
diff --git a/arch/arm/mach-socfpga/include/mach/firewall.h b/arch/arm/mach-socfpga/include/mach/firewall.h
index 430341bea1..adab65bc96 100644
--- a/arch/arm/mach-socfpga/include/mach/firewall.h
+++ b/arch/arm/mach-socfpga/include/mach/firewall.h
@@ -7,6 +7,8 @@
#ifndef _FIREWALL_H_
#define _FIREWALL_H_
+#include <linux/bitops.h>
+
struct socfpga_firwall_l4_per {
u32 nand; /* 0x00 */
u32 nand_data;
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
index 62249b3695..048708202c 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -7,6 +7,7 @@
#include <asm/cache.h>
#include <altera.h>
#include <image.h>
+#include <linux/bitops.h>
#ifndef _FPGA_MANAGER_ARRIA10_H_
#define _FPGA_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
index c8ec5d4c3c..e08c005628 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
@@ -7,6 +7,7 @@
#ifndef _FPGA_MANAGER_GEN5_H_
#define _FPGA_MANAGER_GEN5_H_
+#include <linux/bitops.h>
#define FPGAMGRREGS_STAT_MODE_MASK 0x7
#define FPGAMGRREGS_STAT_MSEL_MASK 0xf8
#define FPGAMGRREGS_STAT_MSEL_LSB 3
diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
index ae728a5df5..55707ab9c5 100644
--- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
@@ -8,6 +8,7 @@
#define _MAILBOX_S10_H_
/* user define Uboot ID */
+#include <linux/bitops.h>
#define MBOX_CLIENT_ID_UBOOT 0xB
#define MBOX_ID_UBOOT 0x1
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index 22e4eb33de..19507c292d 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -7,6 +7,7 @@
#define _RESET_MANAGER_ARRIA10_H_
#include <dt-bindings/reset/altr,rst-mgr-a10.h>
+#include <linux/bitops.h>
void socfpga_watchdog_disable(void);
void socfpga_reset_deassert_noc_ddr_scheduler(void);
diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
index 25b82fb285..ff05994ccc 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
@@ -7,6 +7,7 @@
#define _SOCFPGA_SDRAM_ARRIA10_H_
#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
int ddr_calibration_sequence(void);
struct socfpga_ecc_hmc {
@@ -205,7 +206,7 @@ struct socfpga_io48_mmr {
u32 niosreserve2;
};
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
#define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK 0x1F000000
#define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_SHIFT 24
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h
index 6de0a08131..f816954717 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -94,5 +94,6 @@ phys_addr_t socfpga_get_sysmgr_addr(void);
#define SYSMGR_GET_BOOTINFO_BSEL(bsel) \
(((bsel) >> SYSMGR_BOOTINFO_BSEL_SHIFT) & 7)
+#include <linux/bitops.h>
#endif
#endif /* _SYSTEM_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
index 3a6c9515c6..c90f63a754 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
@@ -6,6 +6,7 @@
#ifndef _SYSTEM_MANAGER_SOC64_H_
#define _SYSTEM_MANAGER_SOC64_H_
+#include <linux/bitops.h>
void sysmgr_pinmux_init(void);
void populate_sysmgr_fpgaintf_module(void);
void populate_sysmgr_pinmux(void);