4 files changed, 15 insertions, 9 deletions
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 4003c2e38b..478fd2f17d 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -1,6 +1,7 @@
 if ARCH_STM32MP
 
 config SPL
+	select SPL_BOARD_INIT
 	select SPL_CLK
 	select SPL_DM
 	select SPL_DM_SEQ_ALIAS
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index c5b8841b23..e4199dbaa5 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -560,7 +560,7 @@ static int init_device(struct stm32prog_data *data,
 #ifdef CONFIG_MMC
 	case STM32PROG_MMC:
 		mmc = find_mmc_device(dev->dev_id);
-		if (mmc_init(mmc)) {
+		if (!mmc || mmc_init(mmc)) {
 			stm32prog_err("mmc device %d not found", dev->dev_id);
 			return -ENODEV;
 		}
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 382067190c..b7fcee2b36 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -154,15 +154,20 @@ static void security_init(void)
  */
 static void dbgmcu_init(void)
 {
-	setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
-
 	/*
 	 * Freeze IWDG2 if Cortex-A7 is in debug mode
 	 * done in TF-A for TRUSTED boot and
 	 * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE
 	*/
-	if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable())
+	if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) {
+		setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
 		setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2);
+	}
+}
+
+void spl_board_init(void)
+{
+	dbgmcu_init();
 }
 #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
 
@@ -220,9 +225,10 @@ static void early_enable_caches(void)
 	dcache_enable();
 
 	if (IS_ENABLED(CONFIG_SPL_BUILD))
-		mmu_set_region_dcache_behaviour(STM32_SYSRAM_BASE,
-						STM32_SYSRAM_SIZE,
-						DCACHE_DEFAULT_OPTION);
+		mmu_set_region_dcache_behaviour(
+			ALIGN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE),
+			round_up(STM32_SYSRAM_SIZE, MMU_SECTION_SIZE),
+			DCACHE_DEFAULT_OPTION);
 	else
 		mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
 						DCACHE_DEFAULT_OPTION);
@@ -241,7 +247,6 @@ int arch_cpu_init(void)
 	timer_init();
 
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
-	dbgmcu_init();
 #ifndef CONFIG_TFABOOT
 	security_init();
 	update_bootmode();
diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c
index 39413e9a0e..e84bdad7bf 100644
--- a/arch/arm/mach-stm32mp/spl.c
+++ b/arch/arm/mach-stm32mp/spl.c
@@ -147,7 +147,7 @@ void spl_board_prepare_for_boot(void)
 	dcache_disable();
 }
 
-void spl_board_prepare_for_boot_linux(void)
+void spl_board_prepare_for_linux(void)
 {
 	dcache_disable();
 }