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-rw-r--r--arch/arm/mach-uniphier/include/mach/boot-device.h2
-rw-r--r--arch/arm/mach-uniphier/include/mach/init.h4
-rw-r--r--arch/arm/mach-uniphier/include/mach/sc-regs.h21
-rw-r--r--arch/arm/mach-uniphier/include/mach/sg-regs.h2
4 files changed, 28 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/include/mach/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h
index eddb25ffa4..3cbe7737a2 100644
--- a/arch/arm/mach-uniphier/include/mach/boot-device.h
+++ b/arch/arm/mach-uniphier/include/mach/boot-device.h
@@ -14,8 +14,10 @@ struct boot_device_info {
u32 ph1_sld3_boot_device(void);
u32 ph1_ld4_boot_device(void);
+u32 ph1_pro5_boot_device(void);
void ph1_sld3_boot_mode_show(void);
void ph1_ld4_boot_mode_show(void);
+void ph1_pro5_boot_mode_show(void);
#endif /* _ASM_BOOT_DEVICE_H_ */
diff --git a/arch/arm/mach-uniphier/include/mach/init.h b/arch/arm/mach-uniphier/include/mach/init.h
index 228cbb1a19..914182d1e8 100644
--- a/arch/arm/mach-uniphier/include/mach/init.h
+++ b/arch/arm/mach-uniphier/include/mach/init.h
@@ -26,6 +26,7 @@ int ph1_sld3_init(const struct uniphier_board_data *bd);
int ph1_ld4_init(const struct uniphier_board_data *bd);
int ph1_pro4_init(const struct uniphier_board_data *bd);
int ph1_sld8_init(const struct uniphier_board_data *bd);
+int ph1_pro5_init(const struct uniphier_board_data *bd);
#if defined(CONFIG_MICRO_SUPPORT_CARD)
int ph1_sld3_sbc_init(const struct uniphier_board_data *bd);
@@ -63,6 +64,7 @@ int ph1_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd);
int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd);
int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd);
+int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd);
int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd);
@@ -74,9 +76,11 @@ void ph1_sld3_pin_init(void);
void ph1_ld4_pin_init(void);
void ph1_pro4_pin_init(void);
void ph1_sld8_pin_init(void);
+void ph1_pro5_pin_init(void);
void ph1_ld4_clk_init(void);
void ph1_pro4_clk_init(void);
+void ph1_pro5_clk_init(void);
#define pr_err(fmt, args...) printf(fmt, ##args)
diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h
index 9d697b16ee..903e405091 100644
--- a/arch/arm/mach-uniphier/include/mach/sc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h
@@ -15,6 +15,10 @@
#define SC_BASE_ADDR 0x61840000
#endif
+#define SC_DPLLOSCCTRL (SC_BASE_ADDR | 0x1110)
+#define SC_DPLLOSCCTRL_DPLLST (0x1 << 1)
+#define SC_DPLLOSCCTRL_DPLLEN (0x1 << 0)
+
#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200)
#define SC_DPLLCTRL_SSC_EN (0x1 << 31)
#define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16)
@@ -43,6 +47,7 @@
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
+/* Pro4 or older */
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
#define SC_RSTCTRL_NRST_UMC0 (0x1 << 4)
#define SC_RSTCTRL_NRST_NAND (0x1 << 2)
@@ -53,6 +58,15 @@
#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008)
+/* Pro5 or newer */
+#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c)
+#define SC_RSTCTRL4_NRST_UMCSB (0x1 << 12) /* UMC system bus */
+#define SC_RSTCTRL4_NRST_UMCA2 (0x1 << 10) /* UMC ch2 standby */
+#define SC_RSTCTRL4_NRST_UMCA1 (0x1 << 9) /* UMC ch1 standby */
+#define SC_RSTCTRL4_NRST_UMCA0 (0x1 << 8) /* UMC ch0 standby */
+#define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */
+#define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */
+
#define SC_CLKCTRL (SC_BASE_ADDR | 0x2104)
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
@@ -60,11 +74,18 @@
#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
+/* Pro4 or older */
#define SC_CLKCTRL_CEN_UMC (0x1 << 4)
#define SC_CLKCTRL_CEN_NAND (0x1 << 2)
#define SC_CLKCTRL_CEN_SBC (0x1 << 1)
#define SC_CLKCTRL_CEN_PERI (0x1 << 0)
+/* Pro5 or newer */
+#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c)
+#define SC_CLKCTRL4_CEN_UMCSB (0x1 << 12) /* UMC system bus */
+#define SC_CLKCTRL4_CEN_UMC1 (0x1 << 1) /* UMC ch1 */
+#define SC_CLKCTRL4_CEN_UMC0 (0x1 << 0) /* UMC ch0 */
+
/* System reset control register */
#define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000)
#define SC_SLFRSTSEL (SC_BASE_ADDR | 0x3010)
diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h
index d8239f28bc..168b35e723 100644
--- a/arch/arm/mach-uniphier/include/mach/sg-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h
@@ -59,7 +59,7 @@
/* Pin Control */
#define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
-/* Only for PH1-Pro4 */
+/* PH1-Pro4, PH1-Pro5 */
#define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
/* Input Enable */