diff options
Diffstat (limited to 'arch/arm/mach-uniphier/pinctrl')
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/Makefile | 7 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c | 49 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c | 45 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c | 50 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c | 43 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c | 25 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c | 43 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c | 45 |
8 files changed, 307 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile new file mode 100644 index 0000000000..85175955d3 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -0,0 +1,7 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pinctrl-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c new file mode 100644 index 0000000000..160d3ef299 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_ld4_pin_init(void) +{ + u32 tmp; + + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(158, 0, 8, 4); /* XNFRE -> XNFRE_GB */ + sg_set_pinsel(159, 0, 8, 4); /* XNFWE -> XNFWE_GB */ + sg_set_pinsel(160, 0, 8, 4); /* XFALE -> NFALE_GB */ + sg_set_pinsel(161, 0, 8, 4); /* XFCLE -> NFCLE_GB */ + sg_set_pinsel(162, 0, 8, 4); /* XNFWP -> XFNWP_GB */ + sg_set_pinsel(163, 0, 8, 4); /* XNFCE0 -> XNFCE0_GB */ + sg_set_pinsel(164, 0, 8, 4); /* NANDRYBY0 -> NANDRYBY0_GB */ + sg_set_pinsel(22, 0, 8, 4); /* MMCCLK -> XFNCE1_GB */ + sg_set_pinsel(23, 0, 8, 4); /* MMCCMD -> NANDRYBY1_GB */ + sg_set_pinsel(24, 0, 8, 4); /* MMCDAT0 -> NFD0_GB */ + sg_set_pinsel(25, 0, 8, 4); /* MMCDAT1 -> NFD1_GB */ + sg_set_pinsel(26, 0, 8, 4); /* MMCDAT2 -> NFD2_GB */ + sg_set_pinsel(27, 0, 8, 4); /* MMCDAT3 -> NFD3_GB */ + sg_set_pinsel(28, 0, 8, 4); /* MMCDAT4 -> NFD4_GB */ + sg_set_pinsel(29, 0, 8, 4); /* MMCDAT5 -> NFD5_GB */ + sg_set_pinsel(30, 0, 8, 4); /* MMCDAT6 -> NFD6_GB */ + sg_set_pinsel(31, 0, 8, 4); /* MMCDAT7 -> NFD7_GB */ +#endif + +#ifdef CONFIG_USB_EHCI_UNIPHIER + sg_set_pinsel(53, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(54, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(55, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(56, 0, 8, 4); /* USB1OD -> USB1OD */ + /* sg_set_pinsel(67, 23, 8, 4); */ /* PCOE -> USB2VBUS */ + /* sg_set_pinsel(68, 23, 8, 4); */ /* PCWAIT -> USB2OD */ +#endif + + tmp = readl(SG_IECTRL); + tmp |= 0x41; + writel(tmp, SG_IECTRL); +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c new file mode 100644 index 0000000000..4f950d3fc6 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_ld6b_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(30, 0, 8, 4); /* XNFRE -> XNFRE */ + sg_set_pinsel(31, 0, 8, 4); /* XNFWE -> XNFWE */ + sg_set_pinsel(32, 0, 8, 4); /* NFALE -> NFALE */ + sg_set_pinsel(33, 0, 8, 4); /* NFCLE -> NFCLE */ + sg_set_pinsel(34, 0, 8, 4); /* XNFWP -> XNFWP */ + sg_set_pinsel(35, 0, 8, 4); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(36, 0, 8, 4); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(37, 0, 8, 4); /* XNFCE1 -> NRYBY1 */ + sg_set_pinsel(38, 0, 8, 4); /* NRYBY1 -> XNFCE1 */ + sg_set_pinsel(39, 0, 8, 4); /* NFD0 -> NFD0 */ + sg_set_pinsel(40, 0, 8, 4); /* NFD1 -> NFD1 */ + sg_set_pinsel(41, 0, 8, 4); /* NFD2 -> NFD2 */ + sg_set_pinsel(42, 0, 8, 4); /* NFD3 -> NFD3 */ + sg_set_pinsel(43, 0, 8, 4); /* NFD4 -> NFD4 */ + sg_set_pinsel(44, 0, 8, 4); /* NFD5 -> NFD5 */ + sg_set_pinsel(45, 0, 8, 4); /* NFD6 -> NFD6 */ + sg_set_pinsel(46, 0, 8, 4); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(56, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(57, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(58, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(59, 0, 8, 4); /* USB1OD -> USB1OD */ + sg_set_pinsel(60, 0, 8, 4); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(61, 0, 8, 4); /* USB2OD -> USB2OD */ + sg_set_pinsel(62, 0, 8, 4); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(63, 0, 8, 4); /* USB3OD -> USB3OD */ +#endif +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c new file mode 100644 index 0000000000..f50644c52b --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_pro4_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(40, 0, 4, 8); /* NFD0 -> NFD0 */ + sg_set_pinsel(41, 0, 4, 8); /* NFD1 -> NFD1 */ + sg_set_pinsel(42, 0, 4, 8); /* NFD2 -> NFD2 */ + sg_set_pinsel(43, 0, 4, 8); /* NFD3 -> NFD3 */ + sg_set_pinsel(44, 0, 4, 8); /* NFD4 -> NFD4 */ + sg_set_pinsel(45, 0, 4, 8); /* NFD5 -> NFD5 */ + sg_set_pinsel(46, 0, 4, 8); /* NFD6 -> NFD6 */ + sg_set_pinsel(47, 0, 4, 8); /* NFD7 -> NFD7 */ + sg_set_pinsel(48, 0, 4, 8); /* NFALE -> NFALE */ + sg_set_pinsel(49, 0, 4, 8); /* NFCLE -> NFCLE */ + sg_set_pinsel(50, 0, 4, 8); /* XNFRE -> XNFRE */ + sg_set_pinsel(51, 0, 4, 8); /* XNFWE -> XNFWE */ + sg_set_pinsel(52, 0, 4, 8); /* XNFWP -> XNFWP */ + sg_set_pinsel(53, 0, 4, 8); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(54, 0, 4, 8); /* NRYBY0 -> NRYBY0 */ + /* sg_set_pinsel(131, 1, 4, 8); */ /* RXD2 -> NRYBY1 */ + /* sg_set_pinsel(132, 1, 4, 8); */ /* TXD2 -> XNFCE1 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(180, 0, 4, 8); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(181, 0, 4, 8); /* USB0OD -> USB0OD */ + sg_set_pinsel(182, 0, 4, 8); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(183, 0, 4, 8); /* USB1OD -> USB1OD */ +#endif + +#ifdef CONFIG_USB_EHCI_UNIPHIER + sg_set_pinsel(184, 0, 4, 8); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(185, 0, 4, 8); /* USB2OD -> USB2OD */ + sg_set_pinsel(187, 0, 4, 8); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(188, 0, 4, 8); /* USB3OD -> USB3OD */ +#endif + + writel(1, SG_LOADPINCTRL); +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c new file mode 100644 index 0000000000..a6cc0824e2 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_pro5_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(19, 0, 4, 8); /* XNFRE -> XNFRE */ + sg_set_pinsel(20, 0, 4, 8); /* XNFWE -> XNFWE */ + sg_set_pinsel(21, 0, 4, 8); /* NFALE -> NFALE */ + sg_set_pinsel(22, 0, 4, 8); /* NFCLE -> NFCLE */ + sg_set_pinsel(23, 0, 4, 8); /* XNFWP -> XNFWP */ + sg_set_pinsel(24, 0, 4, 8); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(25, 0, 4, 8); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(26, 0, 4, 8); /* XNFCE1 -> XNFCE1 */ + sg_set_pinsel(27, 0, 4, 8); /* NRYBY1 -> NRYBY1 */ + sg_set_pinsel(28, 0, 4, 8); /* NFD0 -> NFD0 */ + sg_set_pinsel(29, 0, 4, 8); /* NFD1 -> NFD1 */ + sg_set_pinsel(30, 0, 4, 8); /* NFD2 -> NFD2 */ + sg_set_pinsel(31, 0, 4, 8); /* NFD3 -> NFD3 */ + sg_set_pinsel(32, 0, 4, 8); /* NFD4 -> NFD4 */ + sg_set_pinsel(33, 0, 4, 8); /* NFD5 -> NFD5 */ + sg_set_pinsel(34, 0, 4, 8); /* NFD6 -> NFD6 */ + sg_set_pinsel(35, 0, 4, 8); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(124, 0, 4, 8); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(125, 0, 4, 8); /* USB0OD -> USB0OD */ + sg_set_pinsel(126, 0, 4, 8); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(127, 0, 4, 8); /* USB1OD -> USB1OD */ +#endif + + writel(1, SG_LOADPINCTRL); +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c new file mode 100644 index 0000000000..f1b2bbbb4a --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_sld3_pin_init(void) +{ +#ifdef CONFIG_USB_EHCI_UNIPHIER + sg_set_pinsel(13, 0, 4, 4); /* USB0OC */ + sg_set_pinsel(14, 1, 4, 4); /* USB0VBUS */ + + sg_set_pinsel(15, 0, 4, 4); /* USB1OC */ + sg_set_pinsel(16, 1, 4, 4); /* USB1VBUS */ + + sg_set_pinsel(17, 0, 4, 4); /* USB2OC */ + sg_set_pinsel(18, 1, 4, 4); /* USB2VBUS */ + + sg_set_pinsel(19, 0, 4, 4); /* USB3OC */ + sg_set_pinsel(20, 1, 4, 4); /* USB3VBUS */ +#endif +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c new file mode 100644 index 0000000000..f936a53d1f --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void ph1_sld8_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(15, 0, 8, 4); /* XNFRE_GB -> XNFRE_GB */ + sg_set_pinsel(16, 0, 8, 4); /* XNFWE_GB -> XNFWE_GB */ + sg_set_pinsel(17, 0, 8, 4); /* XFALE_GB -> NFALE_GB */ + sg_set_pinsel(18, 0, 8, 4); /* XFCLE_GB -> NFCLE_GB */ + sg_set_pinsel(19, 0, 8, 4); /* XNFWP_GB -> XFNWP_GB */ + sg_set_pinsel(20, 0, 8, 4); /* XNFCE0_GB -> XNFCE0_GB */ + sg_set_pinsel(21, 0, 8, 4); /* NANDRYBY0_GB -> NANDRYBY0_GB */ + sg_set_pinsel(22, 0, 8, 4); /* XFNCE1_GB -> XFNCE1_GB */ + sg_set_pinsel(23, 0, 8, 4); /* NANDRYBY1_GB -> NANDRYBY1_GB */ + sg_set_pinsel(24, 0, 8, 4); /* NFD0_GB -> NFD0_GB */ + sg_set_pinsel(25, 0, 8, 4); /* NFD1_GB -> NFD1_GB */ + sg_set_pinsel(26, 0, 8, 4); /* NFD2_GB -> NFD2_GB */ + sg_set_pinsel(27, 0, 8, 4); /* NFD3_GB -> NFD3_GB */ + sg_set_pinsel(28, 0, 8, 4); /* NFD4_GB -> NFD4_GB */ + sg_set_pinsel(29, 0, 8, 4); /* NFD5_GB -> NFD5_GB */ + sg_set_pinsel(30, 0, 8, 4); /* NFD6_GB -> NFD6_GB */ + sg_set_pinsel(31, 0, 8, 4); /* NFD7_GB -> NFD7_GB */ +#endif + +#ifdef CONFIG_USB_EHCI_UNIPHIER + sg_set_pinsel(41, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(42, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(43, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(44, 0, 8, 4); /* USB1OD -> USB1OD */ + /* sg_set_pinsel(114, 1, 8, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */ + /* sg_set_pinsel(115, 1, 8, 4); */ /* RXD1 -> USB2OD */ +#endif +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c new file mode 100644 index 0000000000..96abd0235c --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> +#include <mach/init.h> +#include <mach/sg-regs.h> + +void proxstream2_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(30, 8, 8, 4); /* XNFRE -> XNFRE */ + sg_set_pinsel(31, 8, 8, 4); /* XNFWE -> XNFWE */ + sg_set_pinsel(32, 8, 8, 4); /* NFALE -> NFALE */ + sg_set_pinsel(33, 8, 8, 4); /* NFCLE -> NFCLE */ + sg_set_pinsel(34, 8, 8, 4); /* XNFWP -> XNFWP */ + sg_set_pinsel(35, 8, 8, 4); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(36, 8, 8, 4); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(37, 8, 8, 4); /* XNFCE1 -> NRYBY1 */ + sg_set_pinsel(38, 8, 8, 4); /* NRYBY1 -> XNFCE1 */ + sg_set_pinsel(39, 8, 8, 4); /* NFD0 -> NFD0 */ + sg_set_pinsel(40, 8, 8, 4); /* NFD1 -> NFD1 */ + sg_set_pinsel(41, 8, 8, 4); /* NFD2 -> NFD2 */ + sg_set_pinsel(42, 8, 8, 4); /* NFD3 -> NFD3 */ + sg_set_pinsel(43, 8, 8, 4); /* NFD4 -> NFD4 */ + sg_set_pinsel(44, 8, 8, 4); /* NFD5 -> NFD5 */ + sg_set_pinsel(45, 8, 8, 4); /* NFD6 -> NFD6 */ + sg_set_pinsel(46, 8, 8, 4); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(56, 8, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(57, 8, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(58, 8, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(59, 8, 8, 4); /* USB1OD -> USB1OD */ + sg_set_pinsel(60, 8, 8, 4); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(61, 8, 8, 4); /* USB2OD -> USB2OD */ + sg_set_pinsel(62, 8, 8, 4); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(63, 8, 8, 4); /* USB3OD -> USB3OD */ +#endif +} |