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-rw-r--r--arch/arm/mach-uniphier/sbc/Makefile15
-rw-r--r--arch/arm/mach-uniphier/sbc/sbc-boot.c13
-rw-r--r--arch/arm/mach-uniphier/sbc/sbc-ld11.c26
-rw-r--r--arch/arm/mach-uniphier/sbc/sbc-ld4.c25
-rw-r--r--arch/arm/mach-uniphier/sbc/sbc-pxs2.c23
-rw-r--r--arch/arm/mach-uniphier/sbc/sbc-regs.h82
-rw-r--r--arch/arm/mach-uniphier/sbc/sbc.c95
7 files changed, 0 insertions, 279 deletions
diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile
deleted file mode 100644
index 6c698a3922..0000000000
--- a/arch/arm/mach-uniphier/sbc/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += sbc-boot.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y += sbc.o
-
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += sbc-pxs2.o
-endif
diff --git a/arch/arm/mach-uniphier/sbc/sbc-boot.c b/arch/arm/mach-uniphier/sbc/sbc-boot.c
deleted file mode 100644
index ec22b453e0..0000000000
--- a/arch/arm/mach-uniphier/sbc/sbc-boot.c
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-//
-// Copyright (C) 2011-2014 Panasonic Corporation
-// Copyright (C) 2015-2019 Socionext Inc.
-
-#include <linux/io.h>
-
-#include "sbc-regs.h"
-
-int uniphier_sbc_boot_is_swapped(void)
-{
- return !(readl(SBBASE0) & SBBASE_BANK_ENABLE);
-}
diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld11.c b/arch/arm/mach-uniphier/sbc/sbc-ld11.c
deleted file mode 100644
index a0162e1cc8..0000000000
--- a/arch/arm/mach-uniphier/sbc/sbc-ld11.c
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2016-2017 Socionext Inc.
- */
-
-#include <spl.h>
-#include <linux/io.h>
-
-#include "../init.h"
-#include "sbc-regs.h"
-
-void uniphier_ld11_sbc_init(void)
-{
- if (!uniphier_sbc_is_enabled())
- return;
-
- uniphier_sbc_init_savepin();
-
- /* necessary for ROM boot ?? */
- /* system bus output enable */
- writel(0x17, PC0CTRL);
-
- /* pins for NAND and System Bus are multiplexed */
- if (spl_boot_device() != BOOT_DEVICE_NAND)
- uniphier_pin_init("system-bus");
-}
diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c
deleted file mode 100644
index 72e9743c8f..0000000000
--- a/arch/arm/mach-uniphier/sbc/sbc-ld4.c
+++ /dev/null
@@ -1,25 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Copyright (C) 2015-2017 Socionext Inc.
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "sbc-regs.h"
-
-void uniphier_ld4_sbc_init(void)
-{
- u32 tmp;
-
- if (!uniphier_sbc_is_enabled())
- return;
-
- uniphier_sbc_init_savepin();
-
- /* system bus output enable */
- tmp = readl(PC0CTRL);
- tmp &= 0xfffffcff;
- writel(tmp, PC0CTRL);
-}
diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
deleted file mode 100644
index 3275f22ce9..0000000000
--- a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2016-2017 Socionext Inc.
- */
-
-#include <linux/io.h>
-
-#include "../init.h"
-#include "sbc-regs.h"
-
-void uniphier_pxs2_sbc_init(void)
-{
- if (!uniphier_sbc_is_enabled())
- return;
-
- uniphier_sbc_init_savepin();
-
- /* necessary for ROM boot ?? */
- /* system bus output enable */
- writel(0x17, PC0CTRL);
-
- uniphier_pin_init("system-bus"); /* PXs3 */
-}
diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h
deleted file mode 100644
index 1e9618653f..0000000000
--- a/arch/arm/mach-uniphier/sbc/sbc-regs.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * UniPhier SBC (System Bus Controller) registers
- *
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Copyright (C) 2015-2016 Socionext Inc.
- */
-
-#ifndef ARCH_SBC_REGS_H
-#define ARCH_SBC_REGS_H
-
-#define SBBASE_BASE 0x58c00100
-#define SBBASE(x) (SBBASE_BASE + (x) * 0x10)
-
-#define SBBASE0 (SBBASE(0))
-#define SBBASE1 (SBBASE(1))
-#define SBBASE2 (SBBASE(2))
-#define SBBASE3 (SBBASE(3))
-#define SBBASE4 (SBBASE(4))
-#define SBBASE5 (SBBASE(5))
-#define SBBASE6 (SBBASE(6))
-#define SBBASE7 (SBBASE(7))
-
-#define SBBASE_BANK_ENABLE (0x00000001)
-
-#define SBCTRL_BASE 0x58c00200
-#define SBCTRL(x, y) (SBCTRL_BASE + (x) * 0x10 + (y) * 4)
-
-#define SBCTRL00 SBCTRL(0, 0)
-#define SBCTRL01 SBCTRL(0, 1)
-#define SBCTRL02 SBCTRL(0, 2)
-#define SBCTRL03 SBCTRL(0, 3)
-#define SBCTRL04 (SBCTRL_BASE + 0x100)
-
-#define SBCTRL10 SBCTRL(1, 0)
-#define SBCTRL11 SBCTRL(1, 1)
-#define SBCTRL12 SBCTRL(1, 2)
-#define SBCTRL13 SBCTRL(1, 3)
-#define SBCTRL14 (SBCTRL_BASE + 0x110)
-
-#define SBCTRL20 SBCTRL(2, 0)
-#define SBCTRL21 SBCTRL(2, 1)
-#define SBCTRL22 SBCTRL(2, 2)
-#define SBCTRL23 SBCTRL(2, 3)
-#define SBCTRL24 (SBCTRL_BASE + 0x120)
-
-#define SBCTRL30 SBCTRL(3, 0)
-#define SBCTRL31 SBCTRL(3, 1)
-#define SBCTRL32 SBCTRL(3, 2)
-#define SBCTRL33 SBCTRL(3, 3)
-#define SBCTRL34 (SBCTRL_BASE + 0x130)
-
-#define SBCTRL40 SBCTRL(4, 0)
-#define SBCTRL41 SBCTRL(4, 1)
-#define SBCTRL42 SBCTRL(4, 2)
-#define SBCTRL43 SBCTRL(4, 3)
-#define SBCTRL44 (SBCTRL_BASE + 0x140)
-
-#define SBCTRL50 SBCTRL(5, 0)
-#define SBCTRL51 SBCTRL(5, 1)
-#define SBCTRL52 SBCTRL(5, 2)
-#define SBCTRL53 SBCTRL(5, 3)
-#define SBCTRL54 (SBCTRL_BASE + 0x150)
-
-#define SBCTRL60 SBCTRL(6, 0)
-#define SBCTRL61 SBCTRL(6, 1)
-#define SBCTRL62 SBCTRL(6, 2)
-#define SBCTRL63 SBCTRL(6, 3)
-#define SBCTRL64 (SBCTRL_BASE + 0x160)
-
-#define SBCTRL70 SBCTRL(7, 0)
-#define SBCTRL71 SBCTRL(7, 1)
-#define SBCTRL72 SBCTRL(7, 2)
-#define SBCTRL73 SBCTRL(7, 3)
-#define SBCTRL74 (SBCTRL_BASE + 0x170)
-
-#define PC0CTRL 0x598000c0
-
-int uniphier_sbc_boot_is_swapped(void);
-int uniphier_sbc_is_enabled(void);
-
-#endif /* ARCH_SBC_REGS_H */
diff --git a/arch/arm/mach-uniphier/sbc/sbc.c b/arch/arm/mach-uniphier/sbc/sbc.c
deleted file mode 100644
index 2100f49a08..0000000000
--- a/arch/arm/mach-uniphier/sbc/sbc.c
+++ /dev/null
@@ -1,95 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2011-2015 Panasonic Corporation
- * Copyright (C) 2015-2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- */
-
-#include <linux/io.h>
-#include <asm/global_data.h>
-
-#include "../init.h"
-#include "sbc-regs.h"
-
-#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000
-#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500
-#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020
-
-#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000
-#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500
-#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010
-
-/* slower but LED works */
-#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000
-#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00
-#define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009
-#define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110
-
-/* faster but LED does not work */
-#define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000
-#define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700
-/* NOR flash needs more wait counts than SRAM */
-#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009
-#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210
-
-int uniphier_sbc_is_enabled(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- const void *fdt = gd->fdt_blob;
- int offset;
-
- offset = fdt_node_offset_by_compatible(fdt, 0,
- "socionext,uniphier-system-bus");
- if (offset < 0)
- return 0;
-
- return fdtdec_get_is_enabled(fdt, offset);
-}
-
-static void __uniphier_sbc_init(int savepin)
-{
- /*
- * Only CS1 is connected to support card.
- * BKSZ[1:0] should be set to "01".
- */
- if (savepin) {
- writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
- writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
- writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
- writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
- } else {
- writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
- writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
- writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
- }
-
- if (uniphier_sbc_boot_is_swapped()) {
- /*
- * Boot Swap On: boot from external NOR/SRAM
- * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
- *
- * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
- * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
- */
- writel(0x0000bc01, SBBASE0);
- } else {
- /*
- * Boot Swap Off: boot from mask ROM
- * 0x40000000-0x41ffffff: mask ROM
- * 0x42000000-0x43efffff: memory bank (31MB)
- * 0x43f00000-0x43ffffff: peripherals (1MB)
- */
- writel(0x0000be01, SBBASE0); /* dummy */
- writel(0x0200be01, SBBASE1);
- }
-}
-
-void uniphier_sbc_init_admulti(void)
-{
- __uniphier_sbc_init(0);
-}
-
-void uniphier_sbc_init_savepin(void)
-{
- __uniphier_sbc_init(1);
-}
generated by cgit (git 2.34.1) at 2025-01-08 08:25:30 +0000