diff options
Diffstat (limited to 'arch/arm/mach-uniphier')
| -rw-r--r-- | arch/arm/mach-uniphier/Kconfig | 34 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/arm64/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/arm64/lowlevel_init.S | 13 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/board_init.c | 44 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/boot-device/boot-device.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/init.h | 35 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/micro-support-card.c | 110 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/nand-reset.c | 43 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/Makefile | 15 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/sbc-boot.c | 13 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/sbc-ld11.c | 26 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/sbc-ld4.c | 25 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/sbc-pxs2.c | 23 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/sbc-regs.h | 82 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/sbc/sbc.c | 95 |
16 files changed, 67 insertions, 503 deletions
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index bfb445a602..3a8eee7b84 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -3,24 +3,15 @@ if ARCH_UNIPHIER config SYS_CONFIG_NAME default "uniphier" -config ARCH_UNIPHIER_32BIT - bool - select ARCH_SUPPORT_PSCI - select ARMV7_NONSEC - select CPU_V7A - select CPU_V7_HAS_NONSEC - choice prompt "UniPhier SoC select" - default ARCH_UNIPHIER_V7_MULTI - -config ARCH_UNIPHIER_LD4_SLD8 - bool "UniPhier LD4/sLD8 SoCs" - select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_V7_MULTI - bool "UniPhier Pro4/Pro5/PXs2/LD6b SoCs" - select ARCH_UNIPHIER_32BIT + bool "UniPhier V7 SoCs" + select ARCH_SUPPORT_PSCI + select ARMV7_NONSEC + select CPU_V7A + select CPU_V7_HAS_NONSEC config ARCH_UNIPHIER_V8_MULTI bool "UniPhier V8 SoCs" @@ -32,32 +23,38 @@ endchoice config ARCH_UNIPHIER_LD4 bool "Enable UniPhier LD4 SoC support" - depends on ARCH_UNIPHIER_LD4_SLD8 + depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00040000 default y config ARCH_UNIPHIER_SLD8 bool "Enable UniPhier sLD8 SoC support" - depends on ARCH_UNIPHIER_LD4_SLD8 + depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00040000 default y config ARCH_UNIPHIER_PRO4 bool "Enable UniPhier Pro4 SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_PRO5 bool "Enable UniPhier Pro5 SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_PXS2 bool "Enable UniPhier Pxs2 SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_LD6B bool "Enable UniPhier LD6b SoC support" depends on ARCH_UNIPHIER_V7_MULTI + depends on !SPL || SPL_TEXT_BASE = 0x00100000 default y config ARCH_UNIPHIER_LD11 @@ -78,7 +75,7 @@ config ARCH_UNIPHIER_PXS3 config CACHE_UNIPHIER bool "Enable the UniPhier L2 cache controller" - depends on ARCH_UNIPHIER_32BIT + depends on ARCH_UNIPHIER_V7_MULTI default y select SYS_CACHE_SHIFT_7 help @@ -86,6 +83,7 @@ config CACHE_UNIPHIER config MICRO_SUPPORT_CARD bool "Use Micro Support Card" + depends on UNIPHIER_SYSTEM_BUS help This option provides support for the expansion board, available on some UniPhier reference boards. @@ -118,5 +116,5 @@ config CMD_DDRMPHY_DUMP training; it is useful for the evaluation of DDR Multi PHY training. config SYS_SOC - default "uniphier-v7" if ARCH_UNIPHIER_LD4_SLD8 || ARCH_UNIPHIER_V7_MULTI + default "uniphier-v7" if ARCH_UNIPHIER_V7_MULTI endif diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 769778cf50..38b6d904f4 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -22,12 +22,10 @@ endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o -obj-$(CONFIG_NAND_DENALI) += nand-reset.o obj-y += fdt-fixup.o endif -obj-y += sbc/ obj-y += soc-info.o obj-y += boot-device/ obj-y += clk/ diff --git a/arch/arm/mach-uniphier/arm64/Makefile b/arch/arm/mach-uniphier/arm64/Makefile index c569551120..750c4f756e 100644 --- a/arch/arm/mach-uniphier/arm64/Makefile +++ b/arch/arm/mach-uniphier/arm64/Makefile @@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += mem_map.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += lowlevel_init.o diff --git a/arch/arm/mach-uniphier/arm64/lowlevel_init.S b/arch/arm/mach-uniphier/arm64/lowlevel_init.S deleted file mode 100644 index f4e5cbbbd1..0000000000 --- a/arch/arm/mach-uniphier/arm64/lowlevel_init.S +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Socionext Inc. - */ - -#include <linux/linkage.h> - -ENTRY(lowlevel_init) - /* LD20 needs the following code to boot. I do not know why. */ - mrs x0, sctlr_el1 - msr sctlr_el1, x0 - ret -ENDPROC(lowlevel_init) diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 4f9cd6e722..30e4e23a64 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -13,6 +13,33 @@ #include "micro-support-card.h" #include "soc-info.h" +#define PC0CTRL 0x598000c0 + +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_SLD8) +static void uniphier_ld4_sbc_init(void) +{ + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); +} +#endif + +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || \ + defined(CONFIG_ARCH_UNIPHIER_LD6B) || \ + defined(CONFIG_ARCH_UNIPHIER_LD11) || \ + defined(CONFIG_ARCH_UNIPHIER_LD20) || \ + defined(CONFIG_ARCH_UNIPHIER_PXS3) +static void uniphier_pxs2_sbc_init(void) +{ + /* necessary for ROM boot ?? */ + /* system bus output enable */ + writel(0x17, PC0CTRL); +} +#endif + #ifdef CONFIG_ARCH_UNIPHIER_LD20 static void uniphier_ld20_misc_init(void) { @@ -45,7 +72,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_PRO4) { .soc_id = UNIPHIER_PRO4_ID, - .sbc_init = uniphier_sbc_init_savepin, .pll_init = uniphier_pro4_pll_init, .clk_init = uniphier_pro4_clk_init, }, @@ -60,7 +86,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_PRO5) { .soc_id = UNIPHIER_PRO5_ID, - .sbc_init = uniphier_sbc_init_savepin, .clk_init = uniphier_pro5_clk_init, }, #endif @@ -81,7 +106,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_LD11) { .soc_id = UNIPHIER_LD11_ID, - .sbc_init = uniphier_ld11_sbc_init, + .sbc_init = uniphier_pxs2_sbc_init, .pll_init = uniphier_ld11_pll_init, .clk_init = uniphier_ld11_clk_init, }, @@ -89,7 +114,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_LD20) { .soc_id = UNIPHIER_LD20_ID, - .sbc_init = uniphier_ld11_sbc_init, + .sbc_init = uniphier_pxs2_sbc_init, .pll_init = uniphier_ld20_pll_init, .clk_init = uniphier_ld20_clk_init, .misc_init = uniphier_ld20_misc_init, @@ -118,7 +143,8 @@ int board_init(void) return -EINVAL; } - initdata->sbc_init(); + if (initdata->sbc_init) + initdata->sbc_init(); support_card_init(); @@ -137,14 +163,6 @@ int board_init(void) if (initdata->misc_init) initdata->misc_init(); - led_puts("U3"); - - support_card_late_init(); - - led_puts("U4"); - - uniphier_nand_reset_assert(); - led_puts("Uboo"); return 0; diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c index 69a35f5fb8..98ff34cfa7 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device.c @@ -14,11 +14,18 @@ #include <linux/log2.h> #include "../init.h" -#include "../sbc/sbc-regs.h" #include "../sg-regs.h" #include "../soc-info.h" #include "boot-device.h" +#define SBBASE0 0x58c00100 +#define SBBASE_BANK_ENABLE BIT(0) + +static int uniphier_sbc_boot_is_swapped(void) +{ + return !(readl(SBBASE0) & SBBASE_BANK_ENABLE); +} + struct uniphier_boot_device_info { unsigned int soc_id; unsigned int boot_device_sel_shift; diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index 622303786c..dd978c0208 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -34,34 +34,6 @@ int uniphier_sld8_init(const struct uniphier_board_data *bd); int uniphier_pro5_init(const struct uniphier_board_data *bd); int uniphier_pxs2_init(const struct uniphier_board_data *bd); -#if defined(CONFIG_MICRO_SUPPORT_CARD) -void uniphier_sbc_init_admulti(void); -void uniphier_sbc_init_savepin(void); -void uniphier_ld4_sbc_init(void); -void uniphier_pxs2_sbc_init(void); -void uniphier_ld11_sbc_init(void); -#else -static inline void uniphier_sbc_init_admulti(void) -{ -} - -static inline void uniphier_sbc_init_savepin(void) -{ -} - -static inline void uniphier_ld4_sbc_init(void) -{ -} - -static inline void uniphier_pxs2_sbc_init(void) -{ -} - -static inline void uniphier_ld11_sbc_init(void) -{ -} -#endif - void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd); int uniphier_memconf_2ch_init(const struct uniphier_board_data *bd); @@ -103,13 +75,6 @@ int uniphier_have_internal_stm(void); int uniphier_boot_from_backend(void); int uniphier_pin_init(const char *pinconfig_name); -#ifdef CONFIG_NAND_DENALI -void uniphier_nand_reset_assert(void); -#else -static inline void uniphier_nand_reset_assert(void) -{ -} -#endif #ifdef CONFIG_ARM64 void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size); #else diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index b09ec54e1f..dbd156ffce 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -5,8 +5,7 @@ * Author: Masahiro Yamada <yamada.masahiro@socionext.com> */ -#include <config.h> -#include <dm/of.h> +#include <dm.h> #include <fdt_support.h> #include <linux/ctype.h> #include <linux/delay.h> @@ -91,6 +90,17 @@ static int support_card_show_revision(void) void support_card_init(void) { + struct udevice *dev; + int ret; + + /* The system bus must be initialized for access to the support card. */ + ret = uclass_get_device_by_driver(UCLASS_SIMPLE_BUS, + DM_GET_DRIVER(uniphier_system_bus_driver), + &dev); + if (ret) + return; + + /* Check DT to see if this board has the support card. */ support_card_detect(); if (!support_card_found) @@ -107,102 +117,6 @@ void support_card_init(void) support_card_show_revision(); } -#if defined(CONFIG_MTD_NOR_FLASH) - -#include <mtd/cfi_flash.h> - -struct memory_bank { - phys_addr_t base; - unsigned long size; -}; - -static int mem_is_flash(const struct memory_bank *mem) -{ - const int loop = 128; - u32 *scratch_addr; - u32 saved_value; - int ret = 1; - int i; - - /* just in case, use the tail of the memory bank */ - scratch_addr = map_physmem(mem->base + mem->size - sizeof(u32) * loop, - sizeof(u32) * loop, MAP_NOCACHE); - - for (i = 0; i < loop; i++, scratch_addr++) { - saved_value = readl(scratch_addr); - writel(~saved_value, scratch_addr); - if (readl(scratch_addr) != saved_value) { - /* We assume no memory or SRAM here. */ - writel(saved_value, scratch_addr); - ret = 0; - break; - } - } - - unmap_physmem(scratch_addr, MAP_NOCACHE); - - return ret; -} - -/* {address, size} */ -static const struct memory_bank memory_banks[] = { - {0x42000000, 0x01f00000}, -}; - -static const struct memory_bank -*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT]; - -phys_addr_t cfi_flash_bank_addr(int i) -{ - return flash_banks_list[i]->base; -} - -unsigned long cfi_flash_bank_size(int i) -{ - return flash_banks_list[i]->size; -} - -static void detect_num_flash_banks(void) -{ - const struct memory_bank *memory_bank, *end; - - cfi_flash_num_flash_banks = 0; - - memory_bank = memory_banks; - end = memory_bank + ARRAY_SIZE(memory_banks); - - for (; memory_bank < end; memory_bank++) { - if (cfi_flash_num_flash_banks >= - CONFIG_SYS_MAX_FLASH_BANKS_DETECT) - break; - - if (mem_is_flash(memory_bank)) { - flash_banks_list[cfi_flash_num_flash_banks] = - memory_bank; - - debug("flash bank found: base = 0x%lx, size = 0x%lx\n", - (unsigned long)memory_bank->base, - (unsigned long)memory_bank->size); - cfi_flash_num_flash_banks++; - } - } - - debug("number of flash banks: %d\n", cfi_flash_num_flash_banks); -} -#else /* CONFIG_MTD_NOR_FLASH */ -static void detect_num_flash_banks(void) -{ -}; -#endif /* CONFIG_MTD_NOR_FLASH */ - -void support_card_late_init(void) -{ - if (!support_card_found) - return; - - detect_num_flash_banks(); -} - static const u8 ledval_num[] = { 0x7e, /* 0 */ 0x0c, /* 1 */ diff --git a/arch/arm/mach-uniphier/nand-reset.c b/arch/arm/mach-uniphier/nand-reset.c deleted file mode 100644 index 11cadaabd8..0000000000 --- a/arch/arm/mach-uniphier/nand-reset.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 or later -/* - * Copyright (C) 2020 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro@socionext.com> - */ - -#include <linux/errno.h> -#include <dm.h> -#include <dm/uclass-internal.h> -#include <reset.h> - -#include "init.h" - -/* - * Assert the Denali NAND controller reset if found. - * - * On LD4, the bootstrap process starts running after power-on reset regardless - * of the boot mode, here the pin-mux is not necessarily set up for NAND, then - * the controller is stuck. Assert the controller reset here, and should be - * deasserted in the driver after the pin-mux is correctly handled. For other - * SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet - * effective when the boot swap is on. So, the reset should be asserted anyway. - */ -void uniphier_nand_reset_assert(void) -{ - struct udevice *dev; - struct reset_ctl_bulk resets; - int ret; - - ret = uclass_find_first_device(UCLASS_MTD, &dev); - if (ret || !dev) - return; - - /* make sure this is the Denali NAND controller */ - if (strcmp(dev->driver->name, "denali-nand-dt")) - return; - - ret = reset_get_bulk(dev, &resets); - if (ret) - return; - - reset_assert_bulk(&resets); -} diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile deleted file mode 100644 index 6c698a3922..0000000000 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ /dev/null @@ -1,15 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ - -obj-y += sbc-boot.o - -ifndef CONFIG_SPL_BUILD -obj-y += sbc.o - -obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += sbc-pxs2.o -endif diff --git a/arch/arm/mach-uniphier/sbc/sbc-boot.c b/arch/arm/mach-uniphier/sbc/sbc-boot.c deleted file mode 100644 index ec22b453e0..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-boot.c +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright (C) 2011-2014 Panasonic Corporation -// Copyright (C) 2015-2019 Socionext Inc. - -#include <linux/io.h> - -#include "sbc-regs.h" - -int uniphier_sbc_boot_is_swapped(void) -{ - return !(readl(SBBASE0) & SBBASE_BANK_ENABLE); -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld11.c b/arch/arm/mach-uniphier/sbc/sbc-ld11.c deleted file mode 100644 index a0162e1cc8..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-ld11.c +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016-2017 Socionext Inc. - */ - -#include <spl.h> -#include <linux/io.h> - -#include "../init.h" -#include "sbc-regs.h" - -void uniphier_ld11_sbc_init(void) -{ - if (!uniphier_sbc_is_enabled()) - return; - - uniphier_sbc_init_savepin(); - - /* necessary for ROM boot ?? */ - /* system bus output enable */ - writel(0x17, PC0CTRL); - - /* pins for NAND and System Bus are multiplexed */ - if (spl_boot_device() != BOOT_DEVICE_NAND) - uniphier_pin_init("system-bus"); -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c deleted file mode 100644 index 72e9743c8f..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-ld4.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Copyright (C) 2015-2017 Socionext Inc. - */ - -#include <linux/io.h> - -#include "../init.h" -#include "sbc-regs.h" - -void uniphier_ld4_sbc_init(void) -{ - u32 tmp; - - if (!uniphier_sbc_is_enabled()) - return; - - uniphier_sbc_init_savepin(); - - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c deleted file mode 100644 index 3275f22ce9..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c +++ /dev/null @@ -1,23 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2016-2017 Socionext Inc. - */ - -#include <linux/io.h> - -#include "../init.h" -#include "sbc-regs.h" - -void uniphier_pxs2_sbc_init(void) -{ - if (!uniphier_sbc_is_enabled()) - return; - - uniphier_sbc_init_savepin(); - - /* necessary for ROM boot ?? */ - /* system bus output enable */ - writel(0x17, PC0CTRL); - - uniphier_pin_init("system-bus"); /* PXs3 */ -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h deleted file mode 100644 index 1e9618653f..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-regs.h +++ /dev/null @@ -1,82 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * UniPhier SBC (System Bus Controller) registers - * - * Copyright (C) 2011-2014 Panasonic Corporation - * Copyright (C) 2015-2016 Socionext Inc. - */ - -#ifndef ARCH_SBC_REGS_H -#define ARCH_SBC_REGS_H - -#define SBBASE_BASE 0x58c00100 -#define SBBASE(x) (SBBASE_BASE + (x) * 0x10) - -#define SBBASE0 (SBBASE(0)) -#define SBBASE1 (SBBASE(1)) -#define SBBASE2 (SBBASE(2)) -#define SBBASE3 (SBBASE(3)) -#define SBBASE4 (SBBASE(4)) -#define SBBASE5 (SBBASE(5)) -#define SBBASE6 (SBBASE(6)) -#define SBBASE7 (SBBASE(7)) - -#define SBBASE_BANK_ENABLE (0x00000001) - -#define SBCTRL_BASE 0x58c00200 -#define SBCTRL(x, y) (SBCTRL_BASE + (x) * 0x10 + (y) * 4) - -#define SBCTRL00 SBCTRL(0, 0) -#define SBCTRL01 SBCTRL(0, 1) -#define SBCTRL02 SBCTRL(0, 2) -#define SBCTRL03 SBCTRL(0, 3) -#define SBCTRL04 (SBCTRL_BASE + 0x100) - -#define SBCTRL10 SBCTRL(1, 0) -#define SBCTRL11 SBCTRL(1, 1) -#define SBCTRL12 SBCTRL(1, 2) -#define SBCTRL13 SBCTRL(1, 3) -#define SBCTRL14 (SBCTRL_BASE + 0x110) - -#define SBCTRL20 SBCTRL(2, 0) -#define SBCTRL21 SBCTRL(2, 1) -#define SBCTRL22 SBCTRL(2, 2) -#define SBCTRL23 SBCTRL(2, 3) -#define SBCTRL24 (SBCTRL_BASE + 0x120) - -#define SBCTRL30 SBCTRL(3, 0) -#define SBCTRL31 SBCTRL(3, 1) -#define SBCTRL32 SBCTRL(3, 2) -#define SBCTRL33 SBCTRL(3, 3) -#define SBCTRL34 (SBCTRL_BASE + 0x130) - -#define SBCTRL40 SBCTRL(4, 0) -#define SBCTRL41 SBCTRL(4, 1) -#define SBCTRL42 SBCTRL(4, 2) -#define SBCTRL43 SBCTRL(4, 3) -#define SBCTRL44 (SBCTRL_BASE + 0x140) - -#define SBCTRL50 SBCTRL(5, 0) -#define SBCTRL51 SBCTRL(5, 1) -#define SBCTRL52 SBCTRL(5, 2) -#define SBCTRL53 SBCTRL(5, 3) -#define SBCTRL54 (SBCTRL_BASE + 0x150) - -#define SBCTRL60 SBCTRL(6, 0) -#define SBCTRL61 SBCTRL(6, 1) -#define SBCTRL62 SBCTRL(6, 2) -#define SBCTRL63 SBCTRL(6, 3) -#define SBCTRL64 (SBCTRL_BASE + 0x160) - -#define SBCTRL70 SBCTRL(7, 0) -#define SBCTRL71 SBCTRL(7, 1) -#define SBCTRL72 SBCTRL(7, 2) -#define SBCTRL73 SBCTRL(7, 3) -#define SBCTRL74 (SBCTRL_BASE + 0x170) - -#define PC0CTRL 0x598000c0 - -int uniphier_sbc_boot_is_swapped(void); -int uniphier_sbc_is_enabled(void); - -#endif /* ARCH_SBC_REGS_H */ diff --git a/arch/arm/mach-uniphier/sbc/sbc.c b/arch/arm/mach-uniphier/sbc/sbc.c deleted file mode 100644 index 2100f49a08..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc.c +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Copyright (C) 2015-2017 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro@socionext.com> - */ - -#include <linux/io.h> -#include <asm/global_data.h> - -#include "../init.h" -#include "sbc-regs.h" - -#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000 -#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500 -#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020 - -#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000 -#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500 -#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010 - -/* slower but LED works */ -#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000 -#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00 -#define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009 -#define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110 - -/* faster but LED does not work */ -#define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000 -#define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700 -/* NOR flash needs more wait counts than SRAM */ -#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009 -#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210 - -int uniphier_sbc_is_enabled(void) -{ - DECLARE_GLOBAL_DATA_PTR; - const void *fdt = gd->fdt_blob; - int offset; - - offset = fdt_node_offset_by_compatible(fdt, 0, - "socionext,uniphier-system-bus"); - if (offset < 0) - return 0; - - return fdtdec_get_is_enabled(fdt, offset); -} - -static void __uniphier_sbc_init(int savepin) -{ - /* - * Only CS1 is connected to support card. - * BKSZ[1:0] should be set to "01". - */ - if (savepin) { - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); - } else { - writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12); - } - - if (uniphier_sbc_boot_is_swapped()) { - /* - * Boot Swap On: boot from external NOR/SRAM - * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. - * - * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank - * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals - */ - writel(0x0000bc01, SBBASE0); - } else { - /* - * Boot Swap Off: boot from mask ROM - * 0x40000000-0x41ffffff: mask ROM - * 0x42000000-0x43efffff: memory bank (31MB) - * 0x43f00000-0x43ffffff: peripherals (1MB) - */ - writel(0x0000be01, SBBASE0); /* dummy */ - writel(0x0200be01, SBBASE1); - } -} - -void uniphier_sbc_init_admulti(void) -{ - __uniphier_sbc_init(0); -} - -void uniphier_sbc_init_savepin(void) -{ - __uniphier_sbc_init(1); -} |