summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-lpc32xx/config.h1
-rw-r--r--arch/arm/lib/crt0.S28
-rw-r--r--arch/arm/lib/crt0_64.S15
-rw-r--r--arch/arm/mach-zynq/spl.c2
4 files changed, 8 insertions, 38 deletions
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h
index 2d082ef40d..845ba4f606 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -9,7 +9,6 @@
#ifndef _LPC32XX_CONFIG_H
#define _LPC32XX_CONFIG_H
-#define CONFIG_SYS_GENERIC_BOARD
/* Basic CPU architecture */
#define CONFIG_ARCH_CPU_INIT
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 4c3a94af57..80548ebbf6 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -82,31 +82,11 @@ ENTRY(_main)
#else
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#endif
- mov r2, sp
- sub sp, sp, #GD_SIZE /* allocate one GD above SP */
-#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
- mov r3, sp
- bic r3, r3, #7
- mov sp, r3
-#else
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-#endif
- mov r9, sp /* GD is above SP */
- mov r1, sp
+ mov r0, sp
+ bl board_init_f_mem
+ mov sp, r0
+
mov r0, #0
-clr_gd:
- cmp r1, r2 /* while not at end of GD */
-#if defined(CONFIG_CPU_V7M)
- itt lo
-#endif
- strlo r0, [r1] /* clear 32-bit GD word */
- addlo r1, r1, #4 /* move to next */
- blo clr_gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
- sub sp, sp, #CONFIG_SYS_MALLOC_F_LEN
- str sp, [r9, #GD_MALLOC_BASE]
-#endif
- /* mov r0, #0 not needed due to above code */
bl board_init_f
#if ! defined(CONFIG_SPL_BUILD)
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 8b34e04dad..cef1c7171c 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -74,19 +74,10 @@ ENTRY(_main)
#else
ldr x0, =(CONFIG_SYS_INIT_SP_ADDR)
#endif
- sub x18, x0, #GD_SIZE /* allocate one GD above SP */
- bic x18, x18, #0x7 /* 8-byte alignment for GD */
-zero_gd:
- sub x0, x0, #0x8
- str xzr, [x0]
- cmp x0, x18
- b.gt zero_gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
- ldr x0, =CONFIG_SYS_MALLOC_F_LEN
- sub x0, x18, x0
- str x0, [x18, #GD_MALLOC_BASE]
-#endif
bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
+ bl board_init_f_mem
+ mov sp, x0
+
mov x0, #0
bl board_init_f
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index e7df6d3d7b..7bdac3b12d 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -20,7 +20,6 @@ void board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
- preloader_console_init();
arch_cpu_init();
board_init_r(NULL, 0);
}
@@ -28,6 +27,7 @@ void board_init_f(ulong dummy)
#ifdef CONFIG_SPL_BOARD_INIT
void spl_board_init(void)
{
+ preloader_console_init();
board_init();
}
#endif