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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S37
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h3
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index 340445922d..04a2598006 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -229,10 +229,47 @@ ENTRY(lowlevel_init)
isb
#endif
+#if defined(CONFIG_FSL_LSCH2) && !defined(CONFIG_SPL_BUILD)
+ bl fsl_ocram_init
+#endif
+
mov lr, x29 /* Restore LR */
ret
ENDPROC(lowlevel_init)
+#if defined(CONFIG_FSL_LSCH2) && !defined(CONFIG_SPL_BUILD)
+ENTRY(fsl_ocram_init)
+ mov x28, lr /* Save LR */
+ bl fsl_clear_ocram
+ bl fsl_ocram_clear_ecc_err
+ mov lr, x28 /* Restore LR */
+ ret
+ENDPROC(fsl_ocram_init)
+
+ENTRY(fsl_clear_ocram)
+/* Clear OCRAM */
+ ldr x0, =CONFIG_SYS_FSL_OCRAM_BASE
+ ldr x1, =(CONFIG_SYS_FSL_OCRAM_BASE + CONFIG_SYS_FSL_OCRAM_SIZE)
+ mov x2, #0
+clear_loop:
+ str x2, [x0]
+ add x0, x0, #8
+ cmp x0, x1
+ b.lo clear_loop
+ ret
+ENDPROC(fsl_clear_ocram)
+
+ENTRY(fsl_ocram_clear_ecc_err)
+ /* OCRAM1/2 ECC status bit */
+ mov w1, #0x60
+ ldr x0, =DCSR_DCFG_SBEESR2
+ str w1, [x0]
+ ldr x0, =DCSR_DCFG_MBEESR2
+ str w1, [x0]
+ ret
+ENDPROC(fsl_ocram_init)
+#endif
+
#ifdef CONFIG_FSL_LSCH3
.globl get_svr
get_svr:
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index b3818723ee..045825eb97 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -126,6 +126,9 @@
#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */
#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000 /* Real size 128K */
+#define DCSR_DCFG_SBEESR2 0x20140534
+#define DCSR_DCFG_MBEESR2 0x20140544
+
#define CONFIG_SYS_FSL_CCSR_SCFG_BE
#define CONFIG_SYS_FSL_ESDHC_BE
#define CONFIG_SYS_FSL_WDOG_BE