3 files changed, 21 insertions, 6 deletions
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 9a61fbb453..8304f67192 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -172,10 +172,7 @@
 		regulator-max-microvolt = <1400000>;
 		regulator-always-on;
 		regulator-boot-on;
-
-		/* for rockchip boot on */
-		rockchip,pwm_id= <2>;
-		rockchip,pwm_voltage = <1000000>;
+		regulator-init-microvolt = <950000>;
 	};
 };
 
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 4e5690eae3..2012d9fe04 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
 /*
- * (C) Copyright 2015 Google, Inc
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
  */
 #include <common.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 650d53e4d9..a27138083a 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -48,6 +48,24 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 		      rank, col, bk, cs0_row, bw, row_3_4);
 	}
 
+	/*
+	 * This is workaround for issue we can't get correct size for 4GB ram
+	 * in 32bit system and available before we really need ram space
+	 * out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram).
+	 * The size of 4GB is '0x1 00000000', and this value will be truncated
+	 * to 0 in 32bit system, and system can not get correct ram size.
+	 * Rockchip SoCs reserve a blob of space for peripheral near 4GB,
+	 * and we are now setting SDRAM_MAX_SIZE as max available space for
+	 * ram in 4GB, so we can use this directly to workaround the issue.
+	 * TODO:
+	 *   1. update correct value for SDRAM_MAX_SIZE as what dram
+	 *   controller sees.
+	 *   2. update board_get_usable_ram_top() and dram_init_banksize()
+	 *   to reserve memory for peripheral space after previous update.
+	 */
+	if (size_mb > (SDRAM_MAX_SIZE >> 20))
+		size_mb = (SDRAM_MAX_SIZE >> 20);
+
 	return (size_t)size_mb << 20;
 }