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-rw-r--r--arch/arm/mach-uniphier/Makefile1
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode.c24
-rw-r--r--arch/arm/mach-uniphier/mmc-boot-mode.c34
3 files changed, 35 insertions, 24 deletions
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index 0eb59fb3eb..7baec738c7 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -8,6 +8,7 @@ obj-y += boards.o
obj-y += spl_board_init.o
obj-y += memconf.o
obj-y += bcu/
+obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc-boot-mode.o
else
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
index 6ce327371c..4e1142bd9d 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -76,27 +76,3 @@ u32 spl_boot_device(void)
return mode;
}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
- struct mmc *mmc;
-
- /*
- * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8:
- *
- * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of
- * Extended CSD register; when switching to the Boot Partition 1, the
- * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for
- * the Access Bits, but in fact it uses Write Byte for the Access Bits.
- * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG
- * is lost. This bug was fixed for PH1-Pro5 and later SoCs.
- *
- * Fixup mmc->part_config here because it is used to determine the
- * partition which the U-Boot image is read from.
- */
- mmc = find_mmc_device(0);
- mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK);
- mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE;
-
- return MMCSD_MODE_EMMCBOOT;
-}
diff --git a/arch/arm/mach-uniphier/mmc-boot-mode.c b/arch/arm/mach-uniphier/mmc-boot-mode.c
new file mode 100644
index 0000000000..d60c578ce7
--- /dev/null
+++ b/arch/arm/mach-uniphier/mmc-boot-mode.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <spl.h>
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+ struct mmc *mmc;
+
+ /*
+ * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8:
+ *
+ * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of
+ * Extended CSD register; when switching to the Boot Partition 1, the
+ * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for
+ * the Access Bits, but in fact it uses Write Byte for the Access Bits.
+ * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG
+ * is lost. This bug was fixed for PH1-Pro5 and later SoCs.
+ *
+ * Fixup mmc->part_config here because it is used to determine the
+ * partition which the U-Boot image is read from.
+ */
+ mmc = find_mmc_device(0);
+ mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK);
+ mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE;
+
+ return MMCSD_MODE_EMMCBOOT;
+}