diff options
Diffstat (limited to 'arch/arm')
67 files changed, 314 insertions, 370 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c0a0fd842a..80b0d34190 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -286,13 +286,8 @@ config TARGET_MX35PDK bool "Support mx35pdk" select CPU_ARM1136 -config TARGET_RPI - bool "Support rpi" - select CPU_ARM1176 - -config TARGET_RPI_2 - bool "Support rpi_2" - select CPU_V7 +config ARCH_BCM283X + bool "Broadcom BCM283X family" config TARGET_INTEGRATORAP_CM946ES bool "Support integratorap_cm946es" @@ -727,9 +722,9 @@ endchoice source "arch/arm/mach-at91/Kconfig" -source "arch/arm/mach-davinci/Kconfig" +source "arch/arm/mach-bcm283x/Kconfig" -source "arch/arm/cpu/arm1176/bcm2835/Kconfig" +source "arch/arm/mach-davinci/Kconfig" source "arch/arm/cpu/armv7/exynos/Kconfig" @@ -842,8 +837,6 @@ source "board/palmtreo680/Kconfig" source "board/phytec/pcm051/Kconfig" source "board/ppcag/bg0900/Kconfig" source "board/pxa255_idp/Kconfig" -source "board/raspberrypi/rpi/Kconfig" -source "board/raspberrypi/rpi_2/Kconfig" source "board/samsung/smdk2410/Kconfig" source "board/sandisk/sansa_fuze_plus/Kconfig" source "board/scb9328/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 08946de244..bac3cb27e2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -5,6 +5,7 @@ # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 +machine-$(CONFIG_ARCH_BCM283X) += bcm283x machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_KEYSTONE) += keystone diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 0667984b69..c005ce4905 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -19,9 +19,6 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \ PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \ $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -# Support generic board on ARM -__HAVE_ARCH_GENERIC_BOARD := y - PLATFORM_CPPFLAGS += -D__ARM__ # Choose between ARM/Thumb instruction sets diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 1cfcca9fa6..1ec79a6f35 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -14,7 +14,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> /* ************************************************************************* diff --git a/arch/arm/cpu/arm1176/Makefile b/arch/arm/cpu/arm1176/Makefile index 480e130489..deec427447 100644 --- a/arch/arm/cpu/arm1176/Makefile +++ b/arch/arm/cpu/arm1176/Makefile @@ -10,5 +10,3 @@ extra-y = start.o obj-y = cpu.o - -obj-$(CONFIG_BCM2835) += bcm2835/ diff --git a/arch/arm/cpu/arm1176/bcm2835/Kconfig b/arch/arm/cpu/arm1176/bcm2835/Kconfig deleted file mode 100644 index 73cc72b411..0000000000 --- a/arch/arm/cpu/arm1176/bcm2835/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_RPI || TARGET_RPI_2 - -config DM - default y - -config DM_SERIAL - default y - -config DM_GPIO - default y - -endif diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index ac937bf5b0..4c0ab4d0ee 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -16,7 +16,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #ifndef CONFIG_SYS_PHY_UBOOT_BASE #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 01c85be64b..ec8e88d4b3 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -9,7 +9,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <asm/hardware.h> /* diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index 9b60436539..48abcd5260 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -22,7 +22,6 @@ #include <asm-offsets.h> #include <config.h> #include <common.h> -#include <version.h> /* ************************************************************************* diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 8eb249475e..82cc1c9477 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -18,7 +18,6 @@ #include <asm-offsets.h> #include <config.h> #include <common.h> -#include <version.h> /* ************************************************************************* diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 41123716a7..b55395aa53 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -17,7 +17,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> /* ************************************************************************* diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 1312a9db9e..21fc03b97e 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -39,7 +39,6 @@ endif obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/ obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/ -obj-$(CONFIG_BCM2835) += bcm2835/ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ diff --git a/arch/arm/cpu/armv7/armada-xp/lowlevel_spl.S b/arch/arm/cpu/armv7/armada-xp/lowlevel_spl.S index 1febd7bac5..f4a701204b 100644 --- a/arch/arm/cpu/armv7/armada-xp/lowlevel_spl.S +++ b/arch/arm/cpu/armv7/armada-xp/lowlevel_spl.S @@ -3,7 +3,6 @@ */ #include <config.h> -#include <version.h> #include <linux/linkage.h> ENTRY(save_boot_params) diff --git a/arch/arm/cpu/armv7/bcm2835/Makefile b/arch/arm/cpu/armv7/bcm2835/Makefile deleted file mode 100644 index ed1ee4753d..0000000000 --- a/arch/arm/cpu/armv7/bcm2835/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# (C) Copyright 2012 Stephen Warren -# -# SPDX-License-Identifier: GPL-2.0+ -# - -src_dir := ../../arm1176/bcm2835/ - -obj-y := -obj-y += $(src_dir)/init.o -obj-y += $(src_dir)/reset.o -obj-y += $(src_dir)/timer.o -obj-y += $(src_dir)/mbox.o diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index eb86a7fe7d..bd7540ac61 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -80,12 +80,6 @@ config DM_SPI_FLASH config DM_GPIO default y -config SYS_MALLOC_F - default y - -config SYS_MALLOC_F_LEN - default 0x400 - source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" diff --git a/arch/arm/cpu/armv7/exynos/clock_init_exynos4.c b/arch/arm/cpu/armv7/exynos/clock_init_exynos4.c index 31610909f8..584e4bac09 100644 --- a/arch/arm/cpu/armv7/exynos/clock_init_exynos4.c +++ b/arch/arm/cpu/armv7/exynos/clock_init_exynos4.c @@ -25,7 +25,6 @@ #include <common.h> #include <config.h> -#include <version.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/clk.h> diff --git a/arch/arm/cpu/armv7/exynos/exynos4_setup.h b/arch/arm/cpu/armv7/exynos/exynos4_setup.h index b633e56603..9f29d94c10 100644 --- a/arch/arm/cpu/armv7/exynos/exynos4_setup.h +++ b/arch/arm/cpu/armv7/exynos/exynos4_setup.h @@ -10,7 +10,6 @@ #define _ORIGEN_SETUP_H #include <config.h> -#include <version.h> #include <asm/arch/cpu.h> #ifdef CONFIG_CLK_800_330_165 diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index 65da6e2c17..1f96498fb8 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -106,12 +106,6 @@ config DM_GPIO config DM_SERIAL default y if DM -config SYS_MALLOC_F - default y if DM - -config SYS_MALLOC_F_LEN - default 0x400 if DM - config SYS_SOC default "omap3" diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 7a691519bb..249761308e 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -12,7 +12,6 @@ */ #include <config.h> -#include <version.h> #include <asm/arch/mem.h> #include <asm/arch/clocks_omap3.h> #include <linux/linkage.h> diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S index afed773c63..b4d0627871 100644 --- a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S +++ b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> /* Set up the platform, once the cpu has been initialized */ .globl lowlevel_init diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c index bd9f338301..6a8c15d91f 100644 --- a/arch/arm/cpu/armv7/socfpga/spl.c +++ b/arch/arm/cpu/armv7/socfpga/spl.c @@ -8,7 +8,6 @@ #include <asm/io.h> #include <asm/u-boot.h> #include <asm/utils.h> -#include <version.h> #include <image.h> #include <asm/arch/reset_manager.h> #include <spl.h> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 5050021e02..5ed0f45a26 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -15,7 +15,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <asm/system.h> #include <linux/linkage.h> diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c index 49f4032e9c..c3e04af36d 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c @@ -100,22 +100,23 @@ static struct { unsigned int freq; } pll1_para[] = { /* This array must be ordered by frequency. */ - { PLL1_CFG(16, 0, 0, 0), 384000000 }, - { PLL1_CFG(16, 1, 0, 0), 768000000 }, - { PLL1_CFG(20, 1, 0, 0), 960000000 }, - { PLL1_CFG(21, 1, 0, 0), 1008000000}, - { PLL1_CFG(22, 1, 0, 0), 1056000000}, - { PLL1_CFG(23, 1, 0, 0), 1104000000}, - { PLL1_CFG(24, 1, 0, 0), 1152000000}, - { PLL1_CFG(25, 1, 0, 0), 1200000000}, - { PLL1_CFG(26, 1, 0, 0), 1248000000}, - { PLL1_CFG(27, 1, 0, 0), 1296000000}, - { PLL1_CFG(28, 1, 0, 0), 1344000000}, - { PLL1_CFG(29, 1, 0, 0), 1392000000}, - { PLL1_CFG(30, 1, 0, 0), 1440000000}, { PLL1_CFG(31, 1, 0, 0), 1488000000}, - /* Final catchall entry */ - { PLL1_CFG(31, 1, 0, 0), ~0}, + { PLL1_CFG(30, 1, 0, 0), 1440000000}, + { PLL1_CFG(29, 1, 0, 0), 1392000000}, + { PLL1_CFG(28, 1, 0, 0), 1344000000}, + { PLL1_CFG(27, 1, 0, 0), 1296000000}, + { PLL1_CFG(26, 1, 0, 0), 1248000000}, + { PLL1_CFG(25, 1, 0, 0), 1200000000}, + { PLL1_CFG(24, 1, 0, 0), 1152000000}, + { PLL1_CFG(23, 1, 0, 0), 1104000000}, + { PLL1_CFG(22, 1, 0, 0), 1056000000}, + { PLL1_CFG(21, 1, 0, 0), 1008000000}, + { PLL1_CFG(20, 1, 0, 0), 960000000 }, + { PLL1_CFG(19, 1, 0, 0), 912000000 }, + { PLL1_CFG(16, 1, 0, 0), 768000000 }, + /* Final catchall entry 384MHz*/ + { PLL1_CFG(16, 0, 0, 0), 0 }, + }; void clock_set_pll1(unsigned int hz) @@ -126,10 +127,12 @@ void clock_set_pll1(unsigned int hz) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* Find target frequency */ - while (pll1_para[i].freq < hz) + while (pll1_para[i].freq > hz) i++; hz = pll1_para[i].freq; + if (! hz) + hz = 384000000; /* Calculate system clock divisors */ axi = DIV_ROUND_UP(hz, 432000000); /* Max 450MHz */ diff --git a/arch/arm/cpu/armv7/sunxi/psci.S b/arch/arm/cpu/armv7/sunxi/psci.S index 5be497b7be..e0a524e10c 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.S +++ b/arch/arm/cpu/armv7/sunxi/psci.S @@ -37,7 +37,7 @@ .arch_extension sec -#define ONE_MS (CONFIG_SYS_CLK_FREQ / 1000) +#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000) #define TEN_MS (10 * ONE_MS) #define GICD_BASE 0x1c81000 #define GICC_BASE 0x1c82000 diff --git a/arch/arm/cpu/armv7/sunxi/usbc.c b/arch/arm/cpu/armv7/sunxi/usbc.c index 14de9f98bd..524f25ce83 100644 --- a/arch/arm/cpu/armv7/sunxi/usbc.c +++ b/arch/arm/cpu/armv7/sunxi/usbc.c @@ -182,6 +182,13 @@ static void sunxi_usb_passby(struct sunxi_usbc_hcd *sunxi_usbc, int enable) return; } +void sunxi_usbc_enable_squelch_detect(int index, int enable) +{ + struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; + + usb_phy_write(sunxi_usbc, 0x3c, enable ? 0 : 2, 2); +} + int sunxi_usbc_request_resources(int index) { struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index fa447bce16..d846236500 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -9,7 +9,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <asm/macro.h> #include <linux/linkage.h> diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S index b91a1b662f..baf9401e64 100644 --- a/arch/arm/cpu/armv8/exceptions.S +++ b/arch/arm/cpu/armv8/exceptions.S @@ -7,7 +7,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <asm/ptrace.h> #include <asm/macro.h> #include <linux/linkage.h> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index b4eab0b0f2..e5f2766a4a 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -7,7 +7,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <linux/linkage.h> #include <asm/macro.h> #include <asm/armv8/mmu.h> diff --git a/arch/arm/cpu/armv8/tlb.S b/arch/arm/cpu/armv8/tlb.S index f840b04df5..945445bc37 100644 --- a/arch/arm/cpu/armv8/tlb.S +++ b/arch/arm/cpu/armv8/tlb.S @@ -7,7 +7,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <linux/linkage.h> #include <asm/macro.h> diff --git a/arch/arm/cpu/armv8/transition.S b/arch/arm/cpu/armv8/transition.S index ade1cdead8..253a39bd11 100644 --- a/arch/arm/cpu/armv8/transition.S +++ b/arch/arm/cpu/armv8/transition.S @@ -7,7 +7,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> #include <linux/linkage.h> #include <asm/macro.h> diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index c77d51e6d8..879390be2d 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -21,7 +21,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> /* ************************************************************************* diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 78e0cb8868..eebff661f8 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -11,7 +11,6 @@ #include <asm-offsets.h> #include <config.h> -#include <version.h> /* ************************************************************************* diff --git a/arch/arm/include/asm/arch-sunxi/usbc.h b/arch/arm/include/asm/arch-sunxi/usbc.h index cb538cdc7d..133073321b 100644 --- a/arch/arm/include/asm/arch-sunxi/usbc.h +++ b/arch/arm/include/asm/arch-sunxi/usbc.h @@ -20,3 +20,4 @@ void sunxi_usbc_enable(int index); void sunxi_usbc_disable(int index); void sunxi_usbc_vbus_enable(int index); void sunxi_usbc_vbus_disable(int index); +void sunxi_usbc_enable_squelch_detect(int index, int enable); diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h deleted file mode 100644 index 835ca7e4b6..0000000000 --- a/arch/arm/include/asm/semihosting.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright 2014 Broadcom Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __SEMIHOSTING_H__ -#define __SEMIHOSTING_H__ - -/* - * ARM semihosting functions for loading images to memory. See the source - * code for more information. - */ -int smh_load(const char *fname, void *memp, int avail, int verbose); -long smh_len(const char *fname); - -#endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index fd6d8573f5..c3e964eabc 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -13,7 +13,7 @@ * for them. */ #include <common.h> -#include <asm/semihosting.h> +#include <command.h> #define SYSOPEN 0x01 #define SYSCLOSE 0x02 @@ -26,7 +26,7 @@ /* * Call the handler */ -static long smh_trap(unsigned int sysnum, void *addr) +static noinline long smh_trap(unsigned int sysnum, void *addr) { register long result asm("r0"); #if defined(CONFIG_ARM64) @@ -144,93 +144,71 @@ static long smh_len_fd(long fd) return ret; } -/* - * Open, load a file into memory, and close it. Check that the available space - * is sufficient to store the entire file. Return the bytes actually read from - * the file as seen by the read function. The verbose flag enables some extra - * printing of successful read status. - */ -int smh_load(const char *fname, void *memp, int avail, int verbose) +static int smh_load_file(const char * const name, ulong load_addr, + ulong *end_addr) { - long ret; long fd; - size_t len; - - ret = -1; - - debug("%s: fname \'%s\', avail %u, memp %p\n", __func__, fname, - avail, memp); + long len; + long ret; - /* Open the file */ - fd = smh_open(fname, "rb"); + fd = smh_open(name, "rb"); if (fd == -1) return -1; - /* Get the file length */ - ret = smh_len_fd(fd); - if (ret == -1) { - smh_close(fd); - return -1; - } - - /* Check that the file will fit in the supplied buffer */ - if (ret > avail) { - printf("%s: ERROR ret %ld, avail %u\n", __func__, ret, - avail); + len = smh_len_fd(fd); + if (len < 0) { smh_close(fd); return -1; } - len = ret; + ret = smh_read(fd, (void *)load_addr, len); + smh_close(fd); - /* Read the file into the buffer */ - ret = smh_read(fd, memp, len); if (ret == 0) { - /* Print successful load information if requested */ - if (verbose) { - printf("\n%s\n", fname); - printf(" 0x%8p dest\n", memp); - printf(" 0x%08lx size\n", len); - printf(" 0x%08x avail\n", avail); - } + *end_addr = load_addr + len - 1; + printf("loaded file %s from %08lX to %08lX, %08lX bytes\n", + name, + load_addr, + *end_addr, + len); + } else { + printf("read failed\n"); + return 0; } - /* Close the file */ - smh_close(fd); - - return ret; + return 0; } -/* - * Get the file length from the filename - */ -long smh_len(const char *fname) +static int do_smhload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - long ret; - long fd; - long len; - - debug("%s: file \'%s\'\n", __func__, fname); - - /* Open the file */ - fd = smh_open(fname, "rb"); - if (fd < 0) - return fd; - - /* Get the file length */ - len = smh_len_fd(fd); - if (len < 0) { - smh_close(fd); - return len; + if (argc == 3 || argc == 4) { + ulong load_addr; + ulong end_addr = 0; + ulong ret; + char end_str[64]; + + load_addr = simple_strtoul(argv[2], NULL, 16); + if (!load_addr) + return -1; + + ret = smh_load_file(argv[1], load_addr, &end_addr); + if (ret < 0) + return 1; + + /* Optionally save returned end to the environment */ + if (argc == 4) { + sprintf(end_str, "0x%08lx", end_addr); + setenv(argv[3], end_str); + } + } else { + return CMD_RET_USAGE; } - - /* Close the file */ - ret = smh_close(fd); - if (ret < 0) - return ret; - - debug("%s: returning len %ld\n", __func__, len); - - /* Return the file length (or -1 error indication) */ - return len; + return 0; } + +U_BOOT_CMD(smhload, 4, 0, do_smhload, "load a file using semihosting", + "<file> 0x<address> [end var]\n" + " - load a semihosted file to the address specified\n" + " if the optional [end var] is specified, the end\n" + " address of the file will be stored in this environment\n" + " variable.\n"); diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig new file mode 100644 index 0000000000..b43f2d91fd --- /dev/null +++ b/arch/arm/mach-bcm283x/Kconfig @@ -0,0 +1,40 @@ +menu "Broadcom BCM283X family" + depends on ARCH_BCM283X + +choice + prompt "Broadcom BCM283X board select" + +config TARGET_RPI + bool "Raspberry Pi" + select CPU_ARM1176 + +config TARGET_RPI_2 + bool "Raspberry Pi 2" + select CPU_V7 + +endchoice + +config DM + default y + +config DM_SERIAL + default y + +config DM_GPIO + default y + +config SYS_BOARD + default "rpi" if TARGET_RPI + default "rpi_2" if TARGET_RPI_2 + +config SYS_VENDOR + default "raspberrypi" + +config SYS_SOC + default "bcm283x" + +config SYS_CONFIG_NAME + default "rpi" if TARGET_RPI + default "rpi_2" if TARGET_RPI_2 + +endmenu diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/mach-bcm283x/Makefile index 7e5dbe1fde..2505428bab 100644 --- a/arch/arm/cpu/arm1176/bcm2835/Makefile +++ b/arch/arm/mach-bcm283x/Makefile @@ -4,5 +4,5 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-y := lowlevel_init.o +obj-$(CONFIG_TARGET_RPI) += lowlevel_init.o obj-y += init.o reset.o timer.o mbox.o diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/mach-bcm283x/include/mach/gpio.h index c8ef8f528a..c8ef8f528a 100644 --- a/arch/arm/include/asm/arch-bcm2835/gpio.h +++ b/arch/arm/mach-bcm283x/include/mach/gpio.h diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h index 04bf480a54..04bf480a54 100644 --- a/arch/arm/include/asm/arch-bcm2835/mbox.h +++ b/arch/arm/mach-bcm283x/include/mach/mbox.h diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h index 2a21ccbf66..2a21ccbf66 100644 --- a/arch/arm/include/asm/arch-bcm2835/sdhci.h +++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h index fc7aec7b7c..fc7aec7b7c 100644 --- a/arch/arm/include/asm/arch-bcm2835/timer.h +++ b/arch/arm/mach-bcm283x/include/mach/timer.h diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h index beb6a08206..beb6a08206 100644 --- a/arch/arm/include/asm/arch-bcm2835/wdog.h +++ b/arch/arm/mach-bcm283x/include/mach/wdog.h diff --git a/arch/arm/cpu/arm1176/bcm2835/init.c b/arch/arm/mach-bcm283x/init.c index e90d3bba1f..e90d3bba1f 100644 --- a/arch/arm/cpu/arm1176/bcm2835/init.c +++ b/arch/arm/mach-bcm283x/init.c diff --git a/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S b/arch/arm/mach-bcm283x/lowlevel_init.S index c7b0843281..c7b0843281 100644 --- a/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S +++ b/arch/arm/mach-bcm283x/lowlevel_init.S diff --git a/arch/arm/cpu/arm1176/bcm2835/mbox.c b/arch/arm/mach-bcm283x/mbox.c index 3b17a31eac..3b17a31eac 100644 --- a/arch/arm/cpu/arm1176/bcm2835/mbox.c +++ b/arch/arm/mach-bcm283x/mbox.c diff --git a/arch/arm/cpu/arm1176/bcm2835/reset.c b/arch/arm/mach-bcm283x/reset.c index 8c37ad9fd4..8c37ad9fd4 100644 --- a/arch/arm/cpu/arm1176/bcm2835/reset.c +++ b/arch/arm/mach-bcm283x/reset.c diff --git a/arch/arm/cpu/arm1176/bcm2835/timer.c b/arch/arm/mach-bcm283x/timer.c index 017907cfb8..017907cfb8 100644 --- a/arch/arm/cpu/arm1176/bcm2835/timer.c +++ b/arch/arm/mach-bcm283x/timer.c diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index fccfd79648..fce1c1dc87 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -17,9 +17,6 @@ config TEGRA124 endchoice -config SYS_MALLOC_F - default y - config SYS_MALLOC_F_LEN default 0x1800 diff --git a/arch/arm/mach-tegra/lowlevel_init.S b/arch/arm/mach-tegra/lowlevel_init.S index a211bb3b1a..4bc0a3f5a1 100644 --- a/arch/arm/mach-tegra/lowlevel_init.S +++ b/arch/arm/mach-tegra/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> #include <linux/linkage.h> .align 5 diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 8335685e32..288e6aba79 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -1,9 +1,6 @@ menu "Panasonic UniPhier platform" depends on ARCH_UNIPHIER -config SYS_SOC - default "uniphier" - config SYS_CONFIG_NAME default "uniphier" @@ -48,12 +45,6 @@ config DCC_MICRO_SUPPORT_CARD endchoice -config SYS_MALLOC_F - default y - -config SYS_MALLOC_F_LEN - default 0x400 - config CMD_PINMON bool "Enable boot mode pins monitor command" default y diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index e7a801b2ac..24591d6ee5 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -12,6 +12,7 @@ obj-y += ddrphy_training.o else +obj-y += late_lowlevel_init.o obj-$(CONFIG_BOARD_EARLY_INIT_F) += board_early_init_f.o obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o obj-$(CONFIG_MISC_INIT_F) += print_misc_info.o @@ -21,7 +22,6 @@ obj-$(CONFIG_BOARD_EARLY_INIT_R) += board_early_init_r.o obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o obj-y += reset.o obj-y += cache_uniphier.o -obj-$(CONFIG_UNIPHIER_SMP) += smp.o obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o obj-$(CONFIG_CMD_DDRPHY_DUMP) += cmd_ddrphy.o diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index 52f3c7c7a6..d8b8228853 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -1,6 +1,7 @@ /* * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * Copyright (C) 2015 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -119,36 +120,7 @@ void v7_outer_cache_disable(void) writel(tmp, SSCC); } -void wakeup_secondary(void); - void enable_caches(void) { - uint32_t reg; - -#ifdef CONFIG_UNIPHIER_SMP - /* - * The secondary CPU must move to DDR, - * before L2 disable. - * On SPL, the Page Table is located on the L2. - */ - wakeup_secondary(); -#endif - /* - * UniPhier SoCs must use L2 cache for init stack pointer. - * We disable L2 and L1 in this order. - * If CONFIG_SYS_DCACHE_OFF is not defined, - * caches are enabled again with a new page table. - */ - - /* L2 disable */ - v7_outer_cache_disable(); - - /* L1 disable */ - reg = get_cr(); - reg &= ~(CR_C | CR_M); - set_cr(reg); - -#ifndef CONFIG_SYS_DCACHE_OFF dcache_enable(); -#endif } diff --git a/arch/arm/mach-uniphier/init_page_table.S b/arch/arm/mach-uniphier/init_page_table.S index 2638bcd779..ac2959a17d 100644 --- a/arch/arm/mach-uniphier/init_page_table.S +++ b/arch/arm/mach-uniphier/init_page_table.S @@ -1,3 +1,11 @@ +/* + * Copyright (C) 2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + #include <config.h> #include <linux/linkage.h> @@ -8,7 +16,7 @@ #define NORMAL 0x0000000e /* Normal Memory Write-Back, No Write-Allocate */ #define TEXT_SECTION ((CONFIG_SPL_TEXT_BASE) >> (SECTION_SHIFT)) -#define STACK_SECTION ((CONFIG_SYS_INIT_SP_ADDR) >> (SECTION_SHIFT)) +#define STACK_SECTION ((CONFIG_SPL_STACK) >> (SECTION_SHIFT)) .section ".rodata" .align 14 diff --git a/arch/arm/mach-uniphier/late_lowlevel_init.S b/arch/arm/mach-uniphier/late_lowlevel_init.S new file mode 100644 index 0000000000..1363364c80 --- /dev/null +++ b/arch/arm/mach-uniphier/late_lowlevel_init.S @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2015 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> +#include <mach/ssc-regs.h> + +ENTRY(lowlevel_init) + ldr r1, = SSCC + ldr r0, [r1] + bic r0, r0, #SSCC_ON @ L2 disable + str r0, [r1] + mov pc, lr +ENDPROC(lowlevel_init) diff --git a/arch/arm/mach-uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S index 92299fe64d..825b160762 100644 --- a/arch/arm/mach-uniphier/lowlevel_init.S +++ b/arch/arm/mach-uniphier/lowlevel_init.S @@ -1,6 +1,7 @@ /* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * Copyright (C) 2012-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -24,8 +25,8 @@ ENTRY(lowlevel_init) * First we need to turn on MMU and Dcache again to get back * data access to L2. */ - mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Contrl Register) - orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache + mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) + orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache mcr p15, 0, r0, c1, c0, 0 #ifdef CONFIG_DEBUG_LL @@ -40,13 +41,32 @@ ENTRY(lowlevel_init) ldr r3, =init_page_table @ page table must be 16KB aligned /* Disable MMU and Dcache before switching Page Table */ - mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Contrl Register) + mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) bic r0, r0, #(CR_C | CR_M) @ disable MMU and Dcache mcr p15, 0, r0, c1, c0, 0 bl enable_mmu #ifdef CONFIG_UNIPHIER_SMP +secondary_startup: + /* + * Entry point for secondary CPUs + * + * The Boot ROM has already enabled MMU for the secondary CPUs as well + * as for the primary one. The MMU table embedded in the Boot ROM + * prohibits the DRAM access, so it is impossible to bring the + * secondary CPUs into DRAM directly. They must jump here into SPL, + * which is run on L2 cache. + * + * Boot Sequence + * [primary CPU] [secondary CPUs] + * start from Boot ROM start from Boot ROM + * jump to SPL sleep in Boot ROM + * kick secondaries ---(sev)---> jump to SPL + * jump to U-Boot main sleep in SPL + * jump to Linux + * kick secondaries ---(sev)---> jump to Linux + */ /* * ACTLR (Auxiliary Control Register) for Cortex-A9 * bit[9] Parity on @@ -54,7 +74,7 @@ ENTRY(lowlevel_init) * bit[7] EXCL (Exclusive cache bit) * bit[6] SMP * bit[3] Write full line of zeros mode - * bit[2] L1 Prefetch enable + * bit[2] L1 prefetch enable * bit[1] L2 prefetch enable * bit[0] FW (Cache and TLB maintenance broadcast) */ @@ -67,20 +87,31 @@ ENTRY(lowlevel_init) and r0, r0, #0x3 cmp r0, #0x0 beq primary_cpu - ldr r1, =ROM_BOOT_ROMRSV2 + /* only for secondary CPUs */ + ldr r1, =ROM_BOOT_ROMRSV2 @ The last data access to L2 cache + mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) + orr r0, r0, #CR_I @ Enable ICache + bic r0, r0, #(CR_C | CR_M) @ MMU and Dcache must be disabled + mcr p15, 0, r0, c1, c0, 0 @ before jumping to Linux mov r0, #0 str r0, [r1] -0: wfe - ldr r0, [r1] + b 1f + /* + * L2 cache is shared among all the CPUs and it might be disabled by + * the primary one. Before that, the following 5 lines must be cached + * on the Icaches of the secondary CPUs. + */ +0: wfe @ kicked by Linux +1: ldr r0, [r1] cmp r0, #0 - beq 0b - bx r0 @ r0: entry point of U-Boot main for the secondary CPU + bxne r0 @ r0: Linux entry for secondary CPUs + b 0b primary_cpu: ldr r1, =ROM_BOOT_ROMRSV2 - ldr r0, =_start @ entry for the secondary CPU + ldr r0, =secondary_startup str r0, [r1] ldr r0, [r1] @ make sure str is complete before sev - sev @ kick the sedoncary CPU + sev @ kick the secondary CPU mrc p15, 4, r1, c15, c0, 0 @ Configuration Base Address Register bfc r1, #0, #13 @ clear bit 12-0 mov r0, #-1 @@ -117,7 +148,7 @@ ENTRY(enable_mmu) * TLBs was already invalidated in "../start.S" * So, we don't need to invalidate it here. */ - mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Contrl Register) + mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) orr r0, r0, #(CR_C | CR_M) @ MMU and Dcache enable mcr p15, 0, r0, c1, c0, 0 @@ -142,7 +173,7 @@ ENTRY(setup_init_ram) ldr r0, = 0x00408006 @ touch to zero with address range ldr r1, = SSCOQM str r0, [r1] - ldr r0, = (CONFIG_SYS_INIT_SP_ADDR - BOOT_RAM_SIZE) @ base address + ldr r0, = (CONFIG_SPL_STACK - BOOT_RAM_SIZE) @ base address ldr r1, = SSCOQAD str r0, [r1] ldr r0, = BOOT_RAM_SIZE @@ -154,7 +185,7 @@ ENTRY(setup_init_ram) ldr r1, = SSCOPPQSEF ldr r0, [r1] cmp r0, #0 @ check if the command is successfully set - bne 0b @ try again if an error occurres + bne 0b @ try again if an error occurs ldr r1, = SSCOLPQS 1: diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 5ce3d8a520..af815c3260 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -5,12 +5,12 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ - pll_spectrum.o umc_init.o ddrphy_init.o + early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_SPL_DM) += platdevice.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o -obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o endif obj-y += boot-mode.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c new file mode 100644 index 0000000000..e5e86bb363 --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <mach/sg-regs.h> + +void early_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_UNIPHIER_SERIAL + sg_set_pinsel(85, 1); /* HSDOUT3 -> RXD0 */ + sg_set_pinsel(88, 1); /* HDDOUT6 -> TXD0 */ + + sg_set_pinsel(69, 23); /* PCIOWR -> TXD1 */ + sg_set_pinsel(70, 23); /* PCIORD -> RXD1 */ + + sg_set_pinsel(128, 13); /* XIRQ6 -> TXD2 */ + sg_set_pinsel(129, 13); /* XIRQ7 -> RXD2 */ + + sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ + sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ +#endif +} diff --git a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c index 15d81ebb3d..3074d0a8d2 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c @@ -1,10 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> #include <asm/io.h> #include <mach/sg-regs.h> @@ -14,20 +14,6 @@ void pin_init(void) /* Comment format: PAD Name -> Function Name */ -#ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(85, 1); /* HSDOUT3 -> RXD0 */ - sg_set_pinsel(88, 1); /* HDDOUT6 -> TXD0 */ - - sg_set_pinsel(69, 23); /* PCIOWR -> TXD1 */ - sg_set_pinsel(70, 23); /* PCIORD -> RXD1 */ - - sg_set_pinsel(128, 13); /* XIRQ6 -> TXD2 */ - sg_set_pinsel(129, 13); /* XIRQ7 -> RXD2 */ - - sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ - sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ -#endif - #ifdef CONFIG_NAND_DENALI sg_set_pinsel(158, 0); /* XNFRE -> XNFRE_GB */ sg_set_pinsel(159, 0); /* XNFWE -> XNFWE_GB */ diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index b88525c82d..f6a584e1f0 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -5,12 +5,12 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += sg_init.o pll_init.o early_clkrst_init.o \ - pll_spectrum.o umc_init.o ddrphy_init.o + early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_SPL_DM) += platdevice.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o -obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o endif obj-y += boot-mode.o diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c new file mode 100644 index 0000000000..85bb6a0b9c --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/io.h> +#include <mach/sg-regs.h> + +void early_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_UNIPHIER_SERIAL + sg_set_pinsel(127, 0); /* RXD0 -> RXD0 */ + sg_set_pinsel(128, 0); /* TXD0 -> TXD0 */ + sg_set_pinsel(129, 0); /* RXD1 -> RXD1 */ + sg_set_pinsel(130, 0); /* TXD1 -> TXD1 */ + sg_set_pinsel(131, 0); /* RXD2 -> RXD2 */ + sg_set_pinsel(132, 0); /* TXD2 -> TXD2 */ + sg_set_pinsel(88, 2); /* CH6CLK -> RXD3 */ + sg_set_pinsel(89, 2); /* CH6VAL -> TXD3 */ +#endif + + writel(1, SG_LOADPINCTRL); +} diff --git a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c index f382ef4842..4df9098ef0 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c @@ -1,10 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> #include <asm/io.h> #include <mach/sg-regs.h> @@ -12,17 +12,6 @@ void pin_init(void) { /* Comment format: PAD Name -> Function Name */ -#ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(127, 0); /* RXD0 -> RXD0 */ - sg_set_pinsel(128, 0); /* TXD0 -> TXD0 */ - sg_set_pinsel(129, 0); /* RXD1 -> RXD1 */ - sg_set_pinsel(130, 0); /* TXD1 -> TXD1 */ - sg_set_pinsel(131, 0); /* RXD2 -> RXD2 */ - sg_set_pinsel(132, 0); /* TXD2 -> TXD2 */ - sg_set_pinsel(88, 2); /* CH6CLK -> RXD3 */ - sg_set_pinsel(89, 2); /* CH6VAL -> TXD3 */ -#endif - #ifdef CONFIG_NAND_DENALI sg_set_pinsel(40, 0); /* NFD0 -> NFD0 */ sg_set_pinsel(41, 0); /* NFD1 -> NFD1 */ diff --git a/arch/arm/mach-uniphier/ph1-sld8/Makefile b/arch/arm/mach-uniphier/ph1-sld8/Makefile index 5ce3d8a520..8eb575e1d3 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/Makefile +++ b/arch/arm/mach-uniphier/ph1-sld8/Makefile @@ -1,16 +1 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ - pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o -else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o -obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o -endif - -obj-y += boot-mode.o +include $(src)/../ph1-ld4/Makefile diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c new file mode 100644 index 0000000000..28cc4296fc --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <mach/sg-regs.h> + +void early_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_UNIPHIER_SERIAL + sg_set_pinsel(70, 3); /* HDDOUT0 -> TXD0 */ + sg_set_pinsel(71, 3); /* HSDOUT1 -> RXD0 */ + + sg_set_pinsel(114, 0); /* TXD1 -> TXD1 */ + sg_set_pinsel(115, 0); /* RXD1 -> RXD1 */ + + sg_set_pinsel(112, 1); /* SBO1 -> TXD2 */ + sg_set_pinsel(113, 1); /* SBI1 -> RXD2 */ + + sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ + sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ +#endif +} diff --git a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c index 4c494ffa40..57a8093048 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c @@ -1,10 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> #include <asm/io.h> #include <mach/sg-regs.h> @@ -12,20 +12,6 @@ void pin_init(void) { /* Comment format: PAD Name -> Function Name */ -#ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(70, 3); /* HDDOUT0 -> TXD0 */ - sg_set_pinsel(71, 3); /* HSDOUT1 -> RXD0 */ - - sg_set_pinsel(114, 0); /* TXD1 -> TXD1 */ - sg_set_pinsel(115, 0); /* RXD1 -> RXD1 */ - - sg_set_pinsel(112, 1); /* SBO1 -> TXD2 */ - sg_set_pinsel(113, 1); /* SBI1 -> RXD2 */ - - sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ - sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ -#endif - #ifdef CONFIG_SYS_I2C_UNIPHIER { u32 tmp; diff --git a/arch/arm/mach-uniphier/smp.S b/arch/arm/mach-uniphier/smp.S deleted file mode 100644 index 18e3a9d21e..0000000000 --- a/arch/arm/mach-uniphier/smp.S +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2013 Panasonic Corporation - * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> -#include <linux/linkage.h> -#include <asm/system.h> -#include <mach/led.h> -#include <mach/sbc-regs.h> - -/* Entry point of U-Boot main program for the secondary CPU */ -LENTRY(secondary_entry) - mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Contrl Register) - bic r0, r0, #(CR_C | CR_M) @ MMU and Dcache disable - mcr p15, 0, r0, c1, c0, 0 - mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs - mcr p15, 0, r0, c7, c5, 0 @ invalidate icache - dsb - led_write(C,0,,) - ldr r1, =ROM_BOOT_ROMRSV2 - mov r0, #0 - str r0, [r1] -0: wfe - ldr r4, [r1] @ r4: entry point for secondary CPUs - cmp r4, #0 - beq 0b - led_write(C, P, U, 1) - bx r4 @ secondary CPUs jump to linux -ENDPROC(secondary_entry) - -ENTRY(wakeup_secondary) - ldr r1, =ROM_BOOT_ROMRSV2 -0: ldr r0, [r1] - cmp r0, #0 - bne 0b - - /* set entry address and send event to the secondary CPU */ - ldr r0, =secondary_entry - str r0, [r1] - ldr r0, [r1] @ make sure store is complete - mov r0, #0x100 -0: subs r0, r0, #1 @ I don't know the reason, but without this wait - bne 0b @ fails to wake up the secondary CPU - sev - - /* wait until the secondary CPU reach to secondary_entry */ -0: ldr r0, [r1] - cmp r0, #0 - bne 0b - bx lr -ENDPROC(wakeup_secondary) diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index c3d90d03d0..a34d3a167c 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -1,6 +1,7 @@ /* * Copyright (C) 2013-2015 Panasonic Corporation - * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * Copyright (C) 2015 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -20,6 +21,7 @@ void pll_init(void); void pin_init(void); void memconf_init(void); void early_clkrst_init(void); +void early_pin_init(void); int umc_init(void); void enable_dpll_ssc(void); @@ -47,6 +49,16 @@ void spl_board_init(void) led_write(L, 2, , ); + early_pin_init(); + + led_write(L, 3, , ); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_write(L, 4, , ); + { int res; @@ -56,9 +68,9 @@ void spl_board_init(void) ; } } - led_write(L, 3, , ); + led_write(L, 5, , ); enable_dpll_ssc(); - led_write(L, 4, , ); + led_write(L, 6, , ); } diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index e7b4158636..77cc794e61 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -1,6 +1,7 @@ /* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * Copyright (C) 2012-2015 Panasonic Corporation + * Copyright (C) 2015 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -94,7 +95,7 @@ void support_card_init(void) /* * After power on, we need to keep the LAN controller in reset state * for a while. (200 usec) - * Fortunatelly, enough wait time is already inserted in pll_init() + * Fortunately, enough wait time is already inserted in pll_init() * function. So we do not have to wait here. */ support_card_reset_deassert(); @@ -213,11 +214,11 @@ static void detect_num_flash_banks(void) debug("number of flash banks: %d\n", cfi_flash_num_flash_banks); } -#else /* ONFIG_SYS_NO_FLASH */ +#else /* CONFIG_SYS_NO_FLASH */ void detect_num_flash_banks(void) { }; -#endif /* ONFIG_SYS_NO_FLASH */ +#endif /* CONFIG_SYS_NO_FLASH */ void support_card_late_init(void) { |