diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts | 59 | ||||
-rw-r--r-- | arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi | 56 |
3 files changed, 116 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ff181978de..aa94c49f37 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -240,6 +240,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo-z7.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ avnet-ultra96-rev1.dtb \ + avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb \ zynqmp-mini.dtb \ zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc1.dtb \ diff --git a/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts new file mode 100644 index 0000000000..ac641ff1a5 --- /dev/null +++ b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 + +/* + * UltraZed-EV Carrier Card v1 (based on the UltraZed-EV SoM) + * http://ultrazed.org/product/ultrazed-ev-carrier-card + */ + +/dts-v1/; + +#include "avnet-ultrazedev-som-v1.0.dtsi" + +/ { + model = "Avnet UltraZed EV Carrier Card v1.0"; + compatible = "avnet,ultrazedev-cc-v1.0-ultrazedev-som-v1.0", + "xlnx,zynqmp"; + chosen { + stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; + }; + aliases { + ethernet0 = &gem3; + serial0 = &uart0; + }; +}; + +&uart0 { + device_type = "serial"; + status = "okay"; +}; + +&i2c_cc { + /* Microchip 24AA025E48T-I/OT: 2K I2C Serial EEPROM with EUI-48 */ + eeprom: eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* IDT Versa Clock 5P49V5935B */ + vc5: clock-generator@6a { + compatible = "idt,5p49v5935"; + reg = <0x6a>; + #clock-cells = <1>; + }; +}; + +/* Ethernet RJ-45 */ +&gem3 { + status = "okay"; +}; + +/* microSD card slot */ +&sdhci1 { + status = "okay"; + xlnx,mio_bank = <1>; + clock-frequency = <199998000>; + max-frequency = <50000000>; + no-1-8-v; + disable-wp; +}; diff --git a/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi b/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi new file mode 100644 index 0000000000..b635db649f --- /dev/null +++ b/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 + +/* + * UltraZed-EV SoM v1 + * http://ultrazed.org/product/ultrazed-ev + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" + +/ { + model = "Avnet UltraZed EV SoM v1.0"; + compatible = "avnet,ultrazedev-som-v1.0", "xlnx,zynqmp"; + memory { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>, /* 2 GB @ offset 0 */ + <0x8 0x0 0x0 0x80000000>; /* 2 GB @ offset 32GB */ + }; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + i2cswitch@70 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + + /* I2C connected to Carrier Card via JX3A1/JX3C1 */ + i2c_cc: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +/* Marvell 88E1512-A0-NNP2I000 Ethernet PHY */ +&gem3 { + phy-mode = "rgmii-id"; + phy-handle = <&gem3phy>; + gem3phy: ethernet-phy@0 { + reg = <0>; + }; +}; + +/* Micron MTFC8GAKAJCN-4M 8 GB eMMC */ +&sdhci0 { + status = "okay"; + xlnx,mio_bank = <0>; + clock-frequency = <199998000>; +}; |