diff options
Diffstat (limited to 'arch/arm')
99 files changed, 1494 insertions, 447 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ae75c760ca..50bcc0b5b9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-xp-theadorable.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ + uniphier-ph1-ld11-ref.dtb \ + uniphier-ph1-ld20-ref.dtb \ uniphier-ph1-ld4-ref.dtb \ uniphier-ph1-ld6b-ref.dtb \ uniphier-ph1-pro4-ace.dtb \ diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts new file mode 100644 index 0000000000..a624a49314 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts @@ -0,0 +1,69 @@ +/* + * Device Tree Source for UniPhier PH1-LD11 Reference Board + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +/include/ "uniphier-ph1-ld11.dtsi" +/include/ "uniphier-support-card.dtsi" + +/ { + model = "UniPhier PH1-LD11 Reference Board"; + compatible = "socionext,ph1-ld11-ref", "socionext,ph1-ld11"; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0x40000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + }; +}; + +ðsc { + interrupts = <0 48 4>; +}; + +&serial0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-Boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi new file mode 100644 index 0000000000..069cdf2007 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi @@ -0,0 +1,205 @@ +/* + * Device Tree Source for UniPhier PH1-LD11 SoC + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/ { + compatible = "socionext,ph1-ld11"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x000>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x001>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + }; + + clocks { + uart_clk: uart_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <58820000>; + }; + + i2c_clk: i2c_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xf01>, + <1 14 0xf01>, + <1 11 0xf01>, + <1 10 0xf01>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + clocks = <&uart_clk>; + }; + + serial1: serial@54006900 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x40>; + interrupts = <0 35 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + clocks = <&uart_clk>; + }; + + serial2: serial@54006a00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x40>; + interrupts = <0 37 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + clocks = <&uart_clk>; + }; + + serial3: serial@54006b00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006b00 0x40>; + interrupts = <0 177 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + clocks = <&uart_clk>; + }; + + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c1: i2c@58781000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58781000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c2: i2c@58782000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58782000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + i2c3: i2c@58783000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58783000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c4: i2c@58784000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58784000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 45 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c5: i2c@58785000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58785000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 25 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + system_bus: system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + status = "disabled"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + }; + + smpctrl@59800000 { + compatible = "socionext,uniphier-smpctrl"; + reg = <0x59801000 0x400>; + }; + + pinctrl: pinctrl@5f801000 { + compatible = "socionext,ph1-ld11-pinctrl", "syscon"; + reg = <0x5f801000 0xe00>; + }; + + gic: interrupt-controller@5fe00000 { + compatible = "arm,gic-v3"; + reg = <0x5fe00000 0x10000>, /* GICD */ + <0x5fe40000 0x80000>; /* GICR */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <1 9 4>; + }; + }; +}; + +/include/ "uniphier-pinctrl.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts new file mode 100644 index 0000000000..108adeb1ff --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts @@ -0,0 +1,69 @@ +/* + * Device Tree Source for UniPhier PH1-LD20 Reference Board + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +/include/ "uniphier-ph1-ld20.dtsi" +/include/ "uniphier-support-card.dtsi" + +/ { + model = "UniPhier PH1-LD20 Reference Board"; + compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20"; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + }; +}; + +ðsc { + interrupts = <0 48 4>; +}; + +&serial0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-Boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi new file mode 100644 index 0000000000..1bb45be82a --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi @@ -0,0 +1,241 @@ +/* + * Device Tree Source for UniPhier PH1-LD20 SoC + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/ { + compatible = "socionext,ph1-ld20"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu2>; + }; + core1 { + cpu = <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0 0x000>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0 0x001>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu3: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + }; + + clocks { + uart_clk: uart_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <58820000>; + }; + + i2c_clk: i2c_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xf01>, + <1 14 0xf01>, + <1 11 0xf01>, + <1 10 0xf01>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + clocks = <&uart_clk>; + }; + + serial1: serial@54006900 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x40>; + interrupts = <0 35 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + clocks = <&uart_clk>; + }; + + serial2: serial@54006a00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x40>; + interrupts = <0 37 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + clocks = <&uart_clk>; + }; + + serial3: serial@54006b00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006b00 0x40>; + interrupts = <0 177 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + clocks = <&uart_clk>; + }; + + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c1: i2c@58781000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58781000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c2: i2c@58782000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58782000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + i2c3: i2c@58783000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58783000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c4: i2c@58784000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58784000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 45 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c5: i2c@58785000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58785000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 25 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + system_bus: system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + status = "disabled"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + }; + + smpctrl@59800000 { + compatible = "socionext,uniphier-smpctrl"; + reg = <0x59801000 0x400>; + }; + + pinctrl: pinctrl@5f801000 { + compatible = "socionext,ph1-ld20-pinctrl", "syscon"; + reg = <0x5f801000 0xe00>; + }; + + gic: interrupt-controller@5fe00000 { + compatible = "arm,gic-v3"; + reg = <0x5fe00000 0x10000>, /* GICD */ + <0x5fe80000 0x80000>; /* GICR */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <1 9 4>; + }; + }; +}; + +/include/ "uniphier-pinctrl.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index d7b000796e..6cae452d7d 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-ld4.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-LD4 Reference Board"; @@ -35,6 +36,10 @@ }; }; +ðsc { + interrupts = <0 49 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index 13a29fdfaa..e2a2a8c5ce 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-ld6b.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-LD6b Reference Board"; @@ -37,6 +38,10 @@ }; }; +ðsc { + interrupts = <0 52 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index 07a9783357..5be76e2d66 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-pro4.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-Pro4 Reference Board"; @@ -38,6 +39,10 @@ }; }; +ðsc { + interrupts = <0 50 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts index c7213c9ff4..c4601cf7be 100644 --- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-sld3.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-sLD3 Reference Board"; @@ -36,6 +37,10 @@ }; }; +ðsc { + interrupts = <0 49 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index ec5c5bdadc..8ceb93e9f5 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-sld8.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-sLD8 Reference Board"; @@ -35,6 +36,10 @@ }; }; +ðsc { + interrupts = <0 48 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 494139a05d..988e60a98c 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -37,6 +37,11 @@ function = "i2c3"; }; + pinctrl_i2c4: i2c4_grp { + groups = "i2c4"; + function = "i2c4"; + }; + pinctrl_sd: sd_grp { groups = "sd"; function = "sd"; diff --git a/arch/arm/dts/uniphier-support-card.dtsi b/arch/arm/dts/uniphier-support-card.dtsi new file mode 100644 index 0000000000..be0f1d694d --- /dev/null +++ b/arch/arm/dts/uniphier-support-card.dtsi @@ -0,0 +1,33 @@ +/* + * Device Tree Source for UniPhier Support Card (Expansion Board) + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +&system_bus { + status = "okay"; + ranges = <1 0x00000000 0x42000000 0x02000000>; + + support_card: support_card { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 1 0x01f00000 0x00100000>; + + ethsc: ethernet@00000000 { + compatible = "smsc,lan9118", "smsc,lan9115"; + reg = <0x00000000 0x1000>; + phy-mode = "mii"; + reg-io-width = <4>; + }; + + serialsc: uart@000b0000 { + compatible = "ns16550a"; + reg = <0x000b0000 0x20>; + clock-frequency = <12288000>; + reg-shift = <1>; + }; + }; +}; diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 660f83c855..4724af58a1 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -5,9 +5,9 @@ config SYS_CONFIG_NAME choice prompt "UniPhier SoC select" - default ARCH_UNIPHIER_PH1_PRO4 + default ARCH_UNIPHIER_PRO4 -config ARCH_UNIPHIER_PH1_SLD3 +config ARCH_UNIPHIER_SLD3 bool "UniPhier PH1-sLD3 SoC" select CPU_V7 @@ -15,7 +15,7 @@ config ARCH_UNIPHIER_LD4_SLD8 bool "UniPhier PH1-LD4/PH1-sLD8 SoC" select CPU_V7 -config ARCH_UNIPHIER_PH1_PRO4 +config ARCH_UNIPHIER_PRO4 bool "UniPhier PH1-Pro4 SoC" select CPU_V7 @@ -25,27 +25,27 @@ config ARCH_UNIPHIER_PRO5_PXS2_LD6B endchoice -config ARCH_UNIPHIER_PH1_LD4 +config ARCH_UNIPHIER_LD4 bool "Enable UniPhier PH1-LD4 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y -config ARCH_UNIPHIER_PH1_SLD8 +config ARCH_UNIPHIER_SLD8 bool "Enable UniPhier PH1-sLD8 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y -config ARCH_UNIPHIER_PH1_PRO5 +config ARCH_UNIPHIER_PRO5 bool "Enable UniPhier PH1-Pro5 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y -config ARCH_UNIPHIER_PROXSTREAM2 +config ARCH_UNIPHIER_PXS2 bool "Enable UniPhier ProXstream2 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y -config ARCH_UNIPHIER_PH1_LD6B +config ARCH_UNIPHIER_LD6B bool "Enable UniPhier PH1-LD6b SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y @@ -68,15 +68,16 @@ config CMD_PINMON config CMD_DDRPHY_DUMP bool "Enable dump command of DDR PHY parameters" - depends on ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4 || \ - ARCH_UNIPHIER_PH1_SLD8 + depends on ARCH_UNIPHIER_LD4 || ARCH_UNIPHIER_PRO4 || ARCH_UNIPHIER_SLD8 + default y help The command "ddrphy" shows the resulting parameters of DDR PHY training; it is useful for the evaluation of DDR PHY training. config CMD_DDRMPHY_DUMP bool "Enable dump command of DDR Multi PHY parameters" - depends on ARCH_UNIPHIER_PROXSTREAM2 || ARCH_UNIPHIER_PH1_LD6B + depends on ARCH_UNIPHIER_PXS2 || ARCH_UNIPHIER_LD6B + default y help The command "ddrmphy" shows the resulting parameters of DDR Multi PHY training; it is useful for the evaluation of DDR Multi PHY training. diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 1a8c649964..35edca1015 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -28,5 +28,6 @@ obj-y += boot-mode/ obj-y += dram/ obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o +obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/ obj-$(CONFIG_CPU_V7) += arm32/ diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S index 8e4943cff9..5db7427dd6 100644 --- a/arch/arm/mach-uniphier/arm32/debug_ll.S +++ b/arch/arm/mach-uniphier/arm32/debug_ll.S @@ -26,8 +26,8 @@ ENTRY(debug_ll_init) and r1, r1, #SG_REVISION_TYPE_MASK mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) -#define PH1_SLD3_UART_CLK 36864000 +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) +#define UNIPHIER_SLD3_UART_CLK 36864000 cmp r1, #0x25 bne ph1_sld3_end @@ -42,13 +42,13 @@ ENTRY(debug_ll_init) orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_SLD3_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_SLD3_UART_CLK, 16 * BAUDRATE) b init_uart ph1_sld3_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) -#define PH1_LD4_UART_CLK 36864000 +#if defined(CONFIG_ARCH_UNIPHIER_LD4) +#define UNIPHIER_LD4_UART_CLK 36864000 cmp r1, #0x26 bne ph1_ld4_end @@ -59,13 +59,13 @@ ph1_sld3_end: sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0 - ldr r3, =DIV_ROUND(PH1_LD4_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE) b init_uart ph1_ld4_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) -#define PH1_PRO4_UART_CLK 73728000 +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) +#define UNIPHIER_PRO4_UART_CLK 73728000 cmp r1, #0x28 bne ph1_pro4_end @@ -80,13 +80,13 @@ ph1_ld4_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_PRO4_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_PRO4_UART_CLK, 16 * BAUDRATE) b init_uart ph1_pro4_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) -#define PH1_SLD8_UART_CLK 80000000 +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) +#define UNIPHIER_SLD8_UART_CLK 80000000 cmp r1, #0x29 bne ph1_sld8_end @@ -97,13 +97,13 @@ ph1_pro4_end: sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0 - ldr r3, =DIV_ROUND(PH1_SLD8_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_SLD8_UART_CLK, 16 * BAUDRATE) b init_uart ph1_sld8_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) -#define PH1_PRO5_UART_CLK 73728000 +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) +#define UNIPHIER_PRO5_UART_CLK 73728000 cmp r1, #0x2A bne ph1_pro5_end @@ -121,13 +121,13 @@ ph1_sld8_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_PRO5_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_PRO5_UART_CLK, 16 * BAUDRATE) b init_uart ph1_pro5_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) -#define PROXSTREAM2_UART_CLK 88900000 +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) +#define UNIPHIER_PXS2_UART_CLK 88900000 cmp r1, #0x2E bne proxstream2_end @@ -146,13 +146,13 @@ ph1_pro5_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PROXSTREAM2_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_PXS2_UART_CLK, 16 * BAUDRATE) b init_uart proxstream2_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) -#define PH1_LD6B_UART_CLK 88900000 +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) +#define UNIPHIER_LD6B_UART_CLK 88900000 cmp r1, #0x2F bne ph1_ld6b_end @@ -170,7 +170,7 @@ proxstream2_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_LD6B_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_LD6B_UART_CLK, 16 * BAUDRATE) b init_uart ph1_ld6b_end: diff --git a/arch/arm/mach-uniphier/bcu/Makefile b/arch/arm/mach-uniphier/bcu/Makefile index b8b0323cd2..02107b376a 100644 --- a/arch/arm/mach-uniphier/bcu/Makefile +++ b/arch/arm/mach-uniphier/bcu/Makefile @@ -2,6 +2,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += bcu-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += bcu-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += bcu-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += bcu-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += bcu-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += bcu-ld4.o diff --git a/arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c b/arch/arm/mach-uniphier/bcu/bcu-ld4.c index bbe8a74ce3..bbe8a74ce3 100644 --- a/arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c +++ b/arch/arm/mach-uniphier/bcu/bcu-ld4.c diff --git a/arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c b/arch/arm/mach-uniphier/bcu/bcu-sld3.c index b7497e9e57..b7497e9e57 100644 --- a/arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c +++ b/arch/arm/mach-uniphier/bcu/bcu-sld3.c diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index 824da25ac7..8e568ee3cd 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -13,50 +13,50 @@ int board_early_init_f(void) led_puts("U0"); switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: ph1_sld3_pin_init(); led_puts("U1"); ph1_ld4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) - case SOC_UNIPHIER_PH1_LD4: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: ph1_ld4_pin_init(); led_puts("U1"); ph1_ld4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) - case SOC_UNIPHIER_PH1_PRO4: +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: ph1_pro4_pin_init(); led_puts("U1"); ph1_pro4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: ph1_sld8_pin_init(); led_puts("U1"); ph1_ld4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: ph1_pro5_pin_init(); led_puts("U1"); ph1_pro5_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) - case SOC_UNIPHIER_PROXSTREAM2: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + case SOC_UNIPHIER_PXS2: proxstream2_pin_init(); led_puts("U1"); proxstream2_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_LD6B: ph1_ld6b_pin_init(); led_puts("U1"); proxstream2_clk_init(); diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index 408aff0cd0..5e98c3f33b 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -12,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) static const struct uniphier_board_data ph1_sld3_data = { .dram_freq = 1600, .dram_nr_ch = 3, @@ -34,7 +34,7 @@ static const struct uniphier_board_data ph1_sld3_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) +#if defined(CONFIG_ARCH_UNIPHIER_LD4) static const struct uniphier_board_data ph1_ld4_data = { .dram_freq = 1600, .dram_nr_ch = 2, @@ -52,7 +52,7 @@ static const struct uniphier_board_data ph1_ld4_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) /* 1GB RAM board */ static const struct uniphier_board_data ph1_pro4_data = { .dram_freq = 1600, @@ -86,7 +86,7 @@ static const struct uniphier_board_data ph1_pro4_2g_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) static const struct uniphier_board_data ph1_sld8_data = { .dram_freq = 1333, .dram_nr_ch = 2, @@ -104,7 +104,7 @@ static const struct uniphier_board_data ph1_sld8_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) static const struct uniphier_board_data ph1_pro5_data = { .dram_freq = 1866, .dram_nr_ch = 2, @@ -121,7 +121,7 @@ static const struct uniphier_board_data ph1_pro5_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) static const struct uniphier_board_data proxstream2_data = { .dram_freq = 2133, .dram_nr_ch = 3, @@ -143,7 +143,7 @@ static const struct uniphier_board_data proxstream2_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) static const struct uniphier_board_data ph1_ld6b_data = { .dram_freq = 1866, .dram_nr_ch = 3, @@ -171,27 +171,27 @@ struct uniphier_board_id { }; static const struct uniphier_board_id uniphier_boards[] = { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) { "socionext,ph1-sld3", &ph1_sld3_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) +#if defined(CONFIG_ARCH_UNIPHIER_LD4) { "socionext,ph1-ld4", &ph1_ld4_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) { "socionext,ph1-pro4-ace", &ph1_pro4_2g_data, }, { "socionext,ph1-pro4-sanji", &ph1_pro4_2g_data, }, { "socionext,ph1-pro4", &ph1_pro4_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) { "socionext,ph1-sld8", &ph1_sld8_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) { "socionext,ph1-pro5", &ph1_pro5_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) { "socionext,proxstream2", &proxstream2_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) { "socionext,ph1-ld6b", &ph1_ld6b_data, }, #endif }; diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile index be0de8f9a9..278df64ad5 100644 --- a/arch/arm/mach-uniphier/boot-mode/Makefile +++ b/arch/arm/mach-uniphier/boot-mode/Makefile @@ -4,12 +4,12 @@ obj-y += boot-mode.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += boot-mode-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += boot-mode-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += boot-mode-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += boot-mode-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += boot-mode-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += boot-mode-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += boot-mode-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += boot-mode-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-mode-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-mode-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-mode-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-mode-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-mode-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-mode-pxs2.o obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c index 8334373f08..ef52d69584 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c @@ -43,7 +43,7 @@ struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NOR, "NOR Boot"}, }; static int get_boot_mode_sel(void) diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c index 0ec6a08879..0ec6a08879 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c index 1b0c183808..1b0c183808 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c index b0f3f9a805..0258fae47a 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c @@ -12,7 +12,7 @@ #include "boot-device.h" static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NOR, "NOR boot"}, {BOOT_DEVICE_NONE, "External Master"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index cf39bf57e9..317a4f126c 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -19,26 +19,24 @@ u32 spl_boot_device_raw(void) return BOOT_DEVICE_NOR; switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: return ph1_sld3_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_LD4: - case SOC_UNIPHIER_PH1_PRO4: - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ + defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_LD4: + case SOC_UNIPHIER_PRO4: + case SOC_UNIPHIER_SLD8: return ph1_ld4_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: return ph1_pro5_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PROXSTREAM2: - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: return proxstream2_boot_device(); #endif default: diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c index 3ff756b7dd..3a66e2b401 100644 --- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c @@ -15,29 +15,27 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: ph1_sld3_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_LD4: - case SOC_UNIPHIER_PH1_PRO4: - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ + defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_LD4: + case SOC_UNIPHIER_PRO4: + case SOC_UNIPHIER_SLD8: ph1_ld4_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: ph1_pro5_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PROXSTREAM2: - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: proxstream2_boot_mode_show(); break; #endif diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index bc0f27c398..1d736a5c0f 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += clk-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += clk-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += clk-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += clk-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index 7a34beea03..7a34beea03 100644 --- a/arch/arm/mach-uniphier/clk/clk-ph1-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index c784c314e1..c784c314e1 100644 --- a/arch/arm/mach-uniphier/clk/clk-ph1-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 039da737d0..039da737d0 100644 --- a/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c diff --git a/arch/arm/mach-uniphier/clk/clk-proxstream2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index a528f048f7..a528f048f7 100644 --- a/arch/arm/mach-uniphier/clk/clk-proxstream2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c diff --git a/arch/arm/mach-uniphier/debug-uart/Makefile b/arch/arm/mach-uniphier/debug-uart/Makefile new file mode 100644 index 0000000000..0bad718de6 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/Makefile @@ -0,0 +1,17 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += debug-uart-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += debug-uart-ld20.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += debug-uart-ld20.o +endif + +obj-y += debug-uart.o diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c new file mode 100644 index 0000000000..2dc2bf8547 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc64-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_LD20_UART_CLK 58820000 + +unsigned int uniphier_ld20_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(54); /* TXD0 */ + sg_set_iectrl(58); /* TXD1 */ + sg_set_iectrl(90); /* TXD2 */ + sg_set_iectrl(94); /* TXD3 */ + sg_set_pinsel(54, 0, 8, 4); /* TXD0 -> TXD0 */ + sg_set_pinsel(58, 1, 8, 4); /* SPITXD1 -> TXD1 */ + sg_set_pinsel(90, 1, 8, 4); /* PC0WE -> TXD2 */ + sg_set_pinsel(94, 1, 8, 4); /* PCD00 -> TXD3 */ + + tmp = readl(SC_CLKCTRL4); + tmp |= SC_CLKCTRL4_PERI; + writel(tmp, SC_CLKCTRL4); + + return DIV_ROUND_CLOSEST(UNIPHIER_LD20_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c new file mode 100644 index 0000000000..d5f1234911 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> + +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_LD4_UART_CLK 36864000 + +unsigned int uniphier_ld4_debug_uart_init(void) +{ + sg_set_iectrl(0); + sg_set_pinsel(88, 1, 8, 4); /* HSDOUT6 -> TXD0 */ + + return DIV_ROUND_CLOSEST(UNIPHIER_LD4_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c new file mode 100644 index 0000000000..50879f595a --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_LD6B_UART_CLK 88888888 + +unsigned int uniphier_ld6b_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(135, 3, 8, 4); /* PORT10 -> TXD0 */ + sg_set_pinsel(115, 0, 8, 4); /* TXD1 -> TXD1 */ + sg_set_pinsel(113, 2, 8, 4); /* SBO0 -> TXD2 */ + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_LD6B_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c new file mode 100644 index 0000000000..91998ec76e --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_PRO4_UART_CLK 73728000 + +unsigned int uniphier_pro4_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */ + + writel(1, SG_LOADPINCTRL); + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_PRO4_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c new file mode 100644 index 0000000000..5390396061 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_PRO5_UART_CLK 73728000 + +unsigned int uniphier_pro5_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(47, 0, 4, 8); /* TXD0 -> TXD0 */ + sg_set_pinsel(49, 0, 4, 8); /* TXD1 -> TXD1 */ + sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */ + sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */ + + writel(1, SG_LOADPINCTRL); + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c new file mode 100644 index 0000000000..22a200a5d6 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_PXS2_UART_CLK 88888888 + +unsigned int uniphier_pxs2_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(217, 8, 8, 4); /* TXD0 -> TXD0 */ + sg_set_pinsel(115, 8, 8, 4); /* TXD1 -> TXD1 */ + sg_set_pinsel(113, 8, 8, 4); /* TXD2 -> TXD2 */ + sg_set_pinsel(219, 8, 8, 4); /* TXD3 -> TXD3 */ + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_PXS2_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c new file mode 100644 index 0000000000..508318a682 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../bcu/bcu-regs.h" +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_SLD3_UART_CLK 36864000 + +unsigned int uniphier_sld3_debug_uart_init(void) +{ + u32 tmp; + + sg_set_pinsel(64, 1, 4, 4); /* TXD0 -> TXD0 */ + + writel(0x24440000, BCSCR5); + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_SLD3_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c new file mode 100644 index 0000000000..68d390cb7f --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> + +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_SLD8_UART_CLK 80000000 + +unsigned int uniphier_sld8_debug_uart_init(void) +{ + sg_set_iectrl(0); + sg_set_pinsel(70, 3, 8, 4); /* HSDOUT6 -> TXD0 */ + + return DIV_ROUND_CLOSEST(UNIPHIER_SLD8_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c new file mode 100644 index 0000000000..d884785acb --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <debug_uart.h> +#include <linux/io.h> +#include <linux/serial_reg.h> + +#include "../soc-info.h" +#include "debug-uart.h" + +#define UNIPHIER_UART_TX 0x00 +#define UNIPHIER_UART_LCR_MCR 0x10 +#define UNIPHIER_UART_LSR 0x14 +#define UNIPHIER_UART_LDR 0x24 + +static void _debug_uart_putc(int c) +{ + void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + + while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE)) + ; + + writel(c, base + UNIPHIER_UART_TX); +} + +void _debug_uart_init(void) +{ + void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + unsigned int divisor; + + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: + divisor = uniphier_sld3_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: + divisor = uniphier_ld4_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: + divisor = uniphier_pro4_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: + divisor = uniphier_sld8_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: + divisor = uniphier_pro5_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + case SOC_UNIPHIER_PXS2: + divisor = uniphier_pxs2_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_LD6B: + divisor = uniphier_ld6b_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD11: + case SOC_UNIPHIER_LD20: + divisor = uniphier_ld20_debug_uart_init(); + break; +#endif + default: + return; + } + + writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR); + + writel(divisor, base + UNIPHIER_UART_LDR); +} +DEBUG_UART_FUNCS diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.h b/arch/arm/mach-uniphier/debug-uart/debug-uart.h new file mode 100644 index 0000000000..8de9124b02 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.h @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _MACH_DEBUG_UART_H +#define _MACH_DEBUG_UART_H + +unsigned int uniphier_sld3_debug_uart_init(void); +unsigned int uniphier_ld4_debug_uart_init(void); +unsigned int uniphier_pro4_debug_uart_init(void); +unsigned int uniphier_sld8_debug_uart_init(void); +unsigned int uniphier_pro5_debug_uart_init(void); +unsigned int uniphier_pxs2_debug_uart_init(void); +unsigned int uniphier_ld6b_debug_uart_init(void); +unsigned int uniphier_ld11_debug_uart_init(void); +unsigned int uniphier_ld20_debug_uart_init(void); + +#endif /* _MACH_DEBUG_UART_H */ diff --git a/arch/arm/mach-uniphier/dram/Makefile b/arch/arm/mach-uniphier/dram/Makefile index 3d1553cbe1..615ba2cce9 100644 --- a/arch/arm/mach-uniphier/dram/Makefile +++ b/arch/arm/mach-uniphier/dram/Makefile @@ -4,14 +4,14 @@ ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += umc-ph1-ld4.o \ - ddrphy-training.o ddrphy-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += umc-ph1-pro4.o \ - ddrphy-training.o ddrphy-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += umc-ph1-sld8.o \ - ddrphy-training.o ddrphy-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += umc-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += umc-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \ + ddrphy-training.o ddrphy-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += umc-pro4.o \ + ddrphy-training.o ddrphy-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += umc-sld8.o \ + ddrphy-training.o ddrphy-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += umc-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += umc-pxs2.o else diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c index 078eb6f71b..7a9f76caeb 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c @@ -5,8 +5,11 @@ */ #include <common.h> +#include <mapmem.h> #include <linux/io.h> +#include <linux/sizes.h> +#include "../soc-info.h" #include "ddrphy-regs.h" /* Select either decimal or hexadecimal */ @@ -18,26 +21,45 @@ /* field separator */ #define FS " " +static unsigned long uniphier_ld4_base[] = { + 0x5bc01000, + 0x5be01000, + 0 /* sentinel */ +}; + +static unsigned long uniphier_pro4_base[] = { + 0x5bc01000, + 0x5be01000, + 0 /* sentinel */ +}; + +static unsigned long uniphier_sld8_base[] = { + 0x5bc01000, + 0x5be01000, + 0 /* sentinel */ +}; + static u32 read_bdl(struct ddrphy_datx8 __iomem *dx, int index) { return (readl(&dx->bdlr[index / 5]) >> (index % 5 * 6)) & 0x3f; } -static void dump_loop(void (*callback)(struct ddrphy_datx8 __iomem *)) +static void dump_loop(unsigned long *base, + void (*callback)(struct ddrphy_datx8 __iomem *)) { - int ch, p, dx; struct ddrphy __iomem *phy; + int p, dx; - for (ch = 0; ch < NR_DDRCH; ch++) { - for (p = 0; p < NR_DDRPHY_PER_CH; p++) { - phy = (struct ddrphy __iomem *)DDRPHY_BASE(ch, p); + for (p = 0; *base; base++, p++) { + phy = map_sysmem(*base, SZ_4K); - for (dx = 0; dx < NR_DATX8_PER_DDRPHY; dx++) { - printf("CH%dP%dDX%d:", ch, p, dx); - (*callback)(&phy->dx[dx]); - printf("\n"); - } + for (dx = 0; dx < NR_DATX8_PER_DDRPHY; dx++) { + printf("PHY%dDX%d:", p, dx); + (*callback)(&phy->dx[dx]); + printf("\n"); } + + unmap_sysmem(phy); } } @@ -51,12 +73,12 @@ static void __wbdl_dump(struct ddrphy_datx8 __iomem *dx) printf(FS "(+" PRINTF_FORMAT ")", readl(&dx->lcdlr[1]) & 0xff); } -static void wbdl_dump(void) +static void wbdl_dump(unsigned long *base) { printf("\n--- Write Bit Delay Line ---\n"); printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM DQS (WDQD)\n"); - dump_loop(&__wbdl_dump); + dump_loop(base, &__wbdl_dump); } static void __rbdl_dump(struct ddrphy_datx8 __iomem *dx) @@ -69,12 +91,12 @@ static void __rbdl_dump(struct ddrphy_datx8 __iomem *dx) printf(FS "(+" PRINTF_FORMAT ")", (readl(&dx->lcdlr[1]) >> 8) & 0xff); } -static void rbdl_dump(void) +static void rbdl_dump(unsigned long *base) { printf("\n--- Read Bit Delay Line ---\n"); printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM (RDQSD)\n"); - dump_loop(&__rbdl_dump); + dump_loop(base, &__rbdl_dump); } static void __wld_dump(struct ddrphy_datx8 __iomem *dx) @@ -92,12 +114,12 @@ static void __wld_dump(struct ddrphy_datx8 __iomem *dx) } } -static void wld_dump(void) +static void wld_dump(unsigned long *base) { printf("\n--- Write Leveling Delay ---\n"); printf(" Rank0 Rank1 Rank2 Rank3\n"); - dump_loop(&__wld_dump); + dump_loop(base, &__wld_dump); } static void __dqsgd_dump(struct ddrphy_datx8 __iomem *dx) @@ -114,12 +136,12 @@ static void __dqsgd_dump(struct ddrphy_datx8 __iomem *dx) } } -static void dqsgd_dump(void) +static void dqsgd_dump(unsigned long *base) { printf("\n--- DQS Gating Delay ---\n"); printf(" Rank0 Rank1 Rank2 Rank3\n"); - dump_loop(&__dqsgd_dump); + dump_loop(base, &__dqsgd_dump); } static void __mdl_dump(struct ddrphy_datx8 __iomem *dx) @@ -130,90 +152,106 @@ static void __mdl_dump(struct ddrphy_datx8 __iomem *dx) printf(FS PRINTF_FORMAT, (mdl >> (8 * i)) & 0xff); } -static void mdl_dump(void) +static void mdl_dump(unsigned long *base) { printf("\n--- Master Delay Line ---\n"); printf(" IPRD TPRD MDLD\n"); - dump_loop(&__mdl_dump); + dump_loop(base, &__mdl_dump); } #define REG_DUMP(x) \ { u32 __iomem *p = &phy->x; printf("%3d: %-10s: %p : %08x\n", \ p - (u32 *)phy, #x, p, readl(p)); } -static void reg_dump(void) +static void reg_dump(unsigned long *base) { - int ch, p; struct ddrphy __iomem *phy; + int p; printf("\n--- DDR PHY registers ---\n"); - for (ch = 0; ch < NR_DDRCH; ch++) { - for (p = 0; p < NR_DDRPHY_PER_CH; p++) { - printf("== Ch%d, PHY%d ==\n", ch, p); - printf(" No: Name : Address : Data\n"); - - phy = (struct ddrphy __iomem *)DDRPHY_BASE(ch, p); - - REG_DUMP(ridr); - REG_DUMP(pir); - REG_DUMP(pgcr[0]); - REG_DUMP(pgcr[1]); - REG_DUMP(pgsr[0]); - REG_DUMP(pgsr[1]); - REG_DUMP(pllcr); - REG_DUMP(ptr[0]); - REG_DUMP(ptr[1]); - REG_DUMP(ptr[2]); - REG_DUMP(ptr[3]); - REG_DUMP(ptr[4]); - REG_DUMP(acmdlr); - REG_DUMP(acbdlr); - REG_DUMP(dxccr); - REG_DUMP(dsgcr); - REG_DUMP(dcr); - REG_DUMP(dtpr[0]); - REG_DUMP(dtpr[1]); - REG_DUMP(dtpr[2]); - REG_DUMP(mr0); - REG_DUMP(mr1); - REG_DUMP(mr2); - REG_DUMP(mr3); - REG_DUMP(dx[0].gcr); - REG_DUMP(dx[0].gtr); - REG_DUMP(dx[1].gcr); - REG_DUMP(dx[1].gtr); - } + for (p = 0; *base; base++, p++) { + phy = map_sysmem(*base, SZ_4K); + + printf("== PHY%d (base: %p) ==\n", p, phy); + printf(" No: Name : Address : Data\n"); + + REG_DUMP(ridr); + REG_DUMP(pir); + REG_DUMP(pgcr[0]); + REG_DUMP(pgcr[1]); + REG_DUMP(pgsr[0]); + REG_DUMP(pgsr[1]); + REG_DUMP(pllcr); + REG_DUMP(ptr[0]); + REG_DUMP(ptr[1]); + REG_DUMP(ptr[2]); + REG_DUMP(ptr[3]); + REG_DUMP(ptr[4]); + REG_DUMP(acmdlr); + REG_DUMP(acbdlr); + REG_DUMP(dxccr); + REG_DUMP(dsgcr); + REG_DUMP(dcr); + REG_DUMP(dtpr[0]); + REG_DUMP(dtpr[1]); + REG_DUMP(dtpr[2]); + REG_DUMP(mr0); + REG_DUMP(mr1); + REG_DUMP(mr2); + REG_DUMP(mr3); + REG_DUMP(dx[0].gcr); + REG_DUMP(dx[0].gtr); + REG_DUMP(dx[1].gcr); + REG_DUMP(dx[1].gtr); + + unmap_sysmem(phy); } } static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { char *cmd = argv[1]; + unsigned long *base; + + switch (uniphier_get_soc_type()) { + case SOC_UNIPHIER_LD4: + base = uniphier_ld4_base; + break; + case SOC_UNIPHIER_PRO4: + base = uniphier_pro4_base; + break; + case SOC_UNIPHIER_SLD8: + base = uniphier_sld8_base; + break; + default: + printf("unsupported SoC\n"); + return CMD_RET_FAILURE; + } if (argc == 1) cmd = "all"; if (!strcmp(cmd, "wbdl") || !strcmp(cmd, "all")) - wbdl_dump(); + wbdl_dump(base); if (!strcmp(cmd, "rbdl") || !strcmp(cmd, "all")) - rbdl_dump(); + rbdl_dump(base); if (!strcmp(cmd, "wld") || !strcmp(cmd, "all")) - wld_dump(); + wld_dump(base); if (!strcmp(cmd, "dqsgd") || !strcmp(cmd, "all")) - dqsgd_dump(); + dqsgd_dump(base); if (!strcmp(cmd, "mdl") || !strcmp(cmd, "all")) - mdl_dump(); + mdl_dump(base); if (!strcmp(cmd, "reg") || !strcmp(cmd, "all")) - reg_dump(); + reg_dump(base); - return 0; + return CMD_RET_SUCCESS; } U_BOOT_CMD( diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c index eb9bf24da0..eb9bf24da0 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c diff --git a/arch/arm/mach-uniphier/dram/ddrphy-regs.h b/arch/arm/mach-uniphier/dram/ddrphy-regs.h index 87f6d0d3a2..a1d51cedf3 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-regs.h +++ b/arch/arm/mach-uniphier/dram/ddrphy-regs.h @@ -158,17 +158,6 @@ struct ddrphy { /* SoC-specific parameters */ #define NR_DATX8_PER_DDRPHY 2 -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) -#define NR_DDRPHY_PER_CH 1 -#else -#define NR_DDRPHY_PER_CH 2 -#endif - -#define NR_DDRCH 2 - -#define DDRPHY_BASE(ch, phy) (0x5bc01000 + 0x200000 * (ch) + 0x1000 * (phy)) - #ifndef __ASSEMBLY__ int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, bool ddr3plus); void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank); diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c index 72447cc776..72447cc776 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ld4.c diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c index 23fb7b9f53..23fb7b9f53 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c +++ b/arch/arm/mach-uniphier/dram/umc-pro4.c diff --git a/arch/arm/mach-uniphier/dram/umc-proxstream2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c index 50c023825e..50c023825e 100644 --- a/arch/arm/mach-uniphier/dram/umc-proxstream2.c +++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c index 6cacd25e7c..6cacd25e7c 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c +++ b/arch/arm/mach-uniphier/dram/umc-sld8.c diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile index 3e1e1b2bc8..59058cdb1f 100644 --- a/arch/arm/mach-uniphier/early-clk/Makefile +++ b/arch/arm/mach-uniphier/early-clk/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += early-clk-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += early-clk-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += early-clk-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c b/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c index 6574767f30..6574767f30 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c b/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c index d98635878b..d98635878b 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c b/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c index a573a96ee5..a573a96ee5 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile index 3be71fbf07..dc4064c05b 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/Makefile +++ b/arch/arm/mach-uniphier/early-pinctrl/Makefile @@ -2,4 +2,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-pinctrl-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-pinctrl-sld3.o diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c index 7923644cd5..7923644cd5 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c +++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index e969fd0c4e..cef9d621c9 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -34,27 +34,33 @@ int ph1_pro5_init(const struct uniphier_board_data *bd); int proxstream2_init(const struct uniphier_board_data *bd); #if defined(CONFIG_MICRO_SUPPORT_CARD) -int ph1_sld3_sbc_init(const struct uniphier_board_data *bd); -int ph1_ld4_sbc_init(const struct uniphier_board_data *bd); -int ph1_pro4_sbc_init(const struct uniphier_board_data *bd); -int proxstream2_sbc_init(const struct uniphier_board_data *bd); +int sbc_admulti_init(const struct uniphier_board_data *bd); +int sbc_savepin_init(const struct uniphier_board_data *bd); +int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd); +int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd); +int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd); #else -static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) +static inline int sbc_admulti_init(const struct uniphier_board_data *bd) { return 0; } -static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd) +static inline int sbc_savepin_init(const struct uniphier_board_data *bd) { return 0; } -static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) +static inline int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd) { return 0; } -static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd) +static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd) +{ + return 0; +} + +static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd) { return 0; } diff --git a/arch/arm/mach-uniphier/init/Makefile b/arch/arm/mach-uniphier/init/Makefile index ef80953623..34b15e3427 100644 --- a/arch/arm/mach-uniphier/init/Makefile +++ b/arch/arm/mach-uniphier/init/Makefile @@ -4,10 +4,10 @@ obj-y += init.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += init-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += init-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += init-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += init-ph1-sld8.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += init-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += init-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += init-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += init-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += init-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += init-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += init-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += init-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += init-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += init-pxs2.o diff --git a/arch/arm/mach-uniphier/init/init-ph1-ld4.c b/arch/arm/mach-uniphier/init/init-ld4.c index a9c6d72e0b..5295cd0316 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-ld4.c +++ b/arch/arm/mach-uniphier/init/init-ld4.c @@ -14,7 +14,8 @@ int ph1_ld4_init(const struct uniphier_board_data *bd) { ph1_ld4_bcu_init(bd); - ph1_ld4_sbc_init(bd); + sbc_savepin_init(bd); + uniphier_ld4_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-pro4.c b/arch/arm/mach-uniphier/init/init-pro4.c index 6fcd8b6c85..456fb48bd7 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-pro4.c +++ b/arch/arm/mach-uniphier/init/init-pro4.c @@ -12,7 +12,7 @@ int ph1_pro4_init(const struct uniphier_board_data *bd) { - ph1_pro4_sbc_init(bd); + sbc_savepin_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-pro5.c b/arch/arm/mach-uniphier/init/init-pro5.c index 45c65cf49a..c2c68031b4 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-pro5.c +++ b/arch/arm/mach-uniphier/init/init-pro5.c @@ -12,7 +12,7 @@ int ph1_pro5_init(const struct uniphier_board_data *bd) { - ph1_pro4_sbc_init(bd); + sbc_savepin_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-proxstream2.c b/arch/arm/mach-uniphier/init/init-pxs2.c index 029c544997..2d4b6fbb9b 100644 --- a/arch/arm/mach-uniphier/init/init-proxstream2.c +++ b/arch/arm/mach-uniphier/init/init-pxs2.c @@ -14,7 +14,8 @@ int proxstream2_init(const struct uniphier_board_data *bd) { int ret; - proxstream2_sbc_init(bd); + sbc_savepin_init(bd); + uniphier_pxs2_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c index 7827ec0bdc..c48126fd1c 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-sld3.c +++ b/arch/arm/mach-uniphier/init/init-sld3.c @@ -14,7 +14,8 @@ int ph1_sld3_init(const struct uniphier_board_data *bd) { ph1_sld3_bcu_init(bd); - ph1_sld3_sbc_init(bd); + sbc_admulti_init(bd); + uniphier_sld3_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-sld8.c b/arch/arm/mach-uniphier/init/init-sld8.c index 6c96aede2a..1f31ca697b 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-sld8.c +++ b/arch/arm/mach-uniphier/init/init-sld8.c @@ -14,7 +14,8 @@ int ph1_sld8_init(const struct uniphier_board_data *bd) { ph1_ld4_bcu_init(bd); - ph1_ld4_sbc_init(bd); + sbc_savepin_init(bd); + uniphier_ld4_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init.c b/arch/arm/mach-uniphier/init/init.c index b30f3bd9d6..7316d51df5 100644 --- a/arch/arm/mach-uniphier/init/init.c +++ b/arch/arm/mach-uniphier/init/init.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <debug_uart.h> #include <spl.h> #include "../init.h" @@ -14,40 +15,43 @@ void spl_board_init(void) { const struct uniphier_board_data *param; +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + param = uniphier_get_board_param(); if (!param) hang(); switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: ph1_sld3_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) - case SOC_UNIPHIER_PH1_LD4: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: ph1_ld4_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) - case SOC_UNIPHIER_PH1_PRO4: +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: ph1_pro4_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: ph1_sld8_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: ph1_pro5_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PROXSTREAM2: - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: proxstream2_init(param); break; #endif diff --git a/arch/arm/mach-uniphier/memconf/Makefile b/arch/arm/mach-uniphier/memconf/Makefile index a152f61266..78bb677dd4 100644 --- a/arch/arm/mach-uniphier/memconf/Makefile +++ b/arch/arm/mach-uniphier/memconf/Makefile @@ -3,6 +3,6 @@ # obj-y += memconf.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += memconf-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += memconf-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += memconf-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += memconf-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += memconf-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += memconf-pxs2.o diff --git a/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c index c47fe0ae53..c47fe0ae53 100644 --- a/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c +++ b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c diff --git a/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c b/arch/arm/mach-uniphier/memconf/memconf-sld3.c index 6fdf910895..6fdf910895 100644 --- a/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c +++ b/arch/arm/mach-uniphier/memconf/memconf-sld3.c diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index f7a37e3e4c..eeb515aa00 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -25,12 +25,12 @@ */ void support_card_reset_deassert(void) { - writel(0, MICRO_SUPPORT_CARD_RESET); + writel(0x00010000, MICRO_SUPPORT_CARD_RESET); } void support_card_reset(void) { - writel(3, MICRO_SUPPORT_CARD_RESET); + writel(0x00020003, MICRO_SUPPORT_CARD_RESET); } static int support_card_show_revision(void) diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile index 80a9cdaa80..5504c24c3d 100644 --- a/arch/arm/mach-uniphier/pinctrl/Makefile +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pinctrl-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += pinctrl-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pinctrl-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += pinctrl-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pinctrl-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += pinctrl-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += pinctrl-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += pinctrl-ld6b.o diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c index 2fe2c7fc80..2fe2c7fc80 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c index 4faeaf535c..4faeaf535c 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c index b08ca1ef31..b08ca1ef31 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c index 79160d6c95..79160d6c95 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c index a662db8ac9..a662db8ac9 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c index 367d9f3bbc..367d9f3bbc 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c index f3fae1d7c6..f3fae1d7c6 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c diff --git a/arch/arm/mach-uniphier/pll/Makefile b/arch/arm/mach-uniphier/pll/Makefile index ca88521a1d..63f169ccc3 100644 --- a/arch/arm/mach-uniphier/pll/Makefile +++ b/arch/arm/mach-uniphier/pll/Makefile @@ -2,11 +2,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pll-init-ph1-sld3.o \ - pll-spectrum-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pll-init-ph1-ld4.o \ - pll-spectrum-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pll-init-ph1-pro4.o \ - pll-spectrum-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pll-init-ph1-sld8.o \ - pll-spectrum-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += pll-init-sld3.o pll-spectrum-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-init-ld4.o pll-spectrum-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += pll-init-pro4.o pll-spectrum-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-init-sld8.o pll-spectrum-ld4.o diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c b/arch/arm/mach-uniphier/pll/pll-init-ld4.c index b2de9e8d5e..b2de9e8d5e 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c +++ b/arch/arm/mach-uniphier/pll/pll-init-ld4.c diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c b/arch/arm/mach-uniphier/pll/pll-init-pro4.c index 69d518d265..69d518d265 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c +++ b/arch/arm/mach-uniphier/pll/pll-init-pro4.c diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c b/arch/arm/mach-uniphier/pll/pll-init-sld3.c index b93806cdc0..b93806cdc0 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c +++ b/arch/arm/mach-uniphier/pll/pll-init-sld3.c diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c b/arch/arm/mach-uniphier/pll/pll-init-sld8.c index 3c7550446a..3c7550446a 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c +++ b/arch/arm/mach-uniphier/pll/pll-init-sld8.c diff --git a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c b/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c index a1c8089de7..a1c8089de7 100644 --- a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c +++ b/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c diff --git a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c b/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c index 94654eeba0..94654eeba0 100644 --- a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c +++ b/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 57eb44b646..e515af9439 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += sbc-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += sbc-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += sbc-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += sbc-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += sbc-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += sbc-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += sbc-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += sbc-admulti.o sbc-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-savepin.o sbc-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += sbc-savepin.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-savepin.o sbc-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += sbc-savepin.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-savepin.o sbc-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-savepin.o sbc-pxs2.o diff --git a/arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-admulti.c index c03c2843a6..8e9f8ebbf4 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c +++ b/arch/arm/mach-uniphier/sbc/sbc-admulti.c @@ -11,10 +11,16 @@ #include "../sg-regs.h" #include "sbc-regs.h" -int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) -{ - /* only address/data multiplex mode is supported */ +#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000 +#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500 +#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020 + +#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000 +#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500 +#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010 +int sbc_admulti_init(const struct uniphier_board_data *bd) +{ /* * Only CS1 is connected to support card. * BKSZ[1:0] should be set to "01". @@ -43,7 +49,5 @@ int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) writel(0x0200be01, SBBASE1); } - sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ - return 0; } diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c new file mode 100644 index 0000000000..12bee79fd6 --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-ld4.c @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "sbc-regs.h" + +int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); + + return 0; +} diff --git a/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c b/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c deleted file mode 100644 index 8313c5a3e5..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <linux/io.h> - -#include "../init.h" -#include "../sg-regs.h" -#include "sbc-regs.h" - -int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) -{ - /* - * Only CS1 is connected to support card. - * BKSZ[1:0] should be set to "01". - */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); - - if (boot_is_swapped()) { - /* - * Boot Swap On: boot from external NOR/SRAM - * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. - * - * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank - * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals - */ - writel(0x0000bc01, SBBASE0); - } else { - /* - * Boot Swap Off: boot from mask ROM - * 0x40000000-0x41ffffff: mask ROM - * 0x42000000-0x43efffff: memory bank (31MB) - * 0x43f00000-0x43ffffff: peripherals (1MB) - */ - writel(0x0000be01, SBBASE0); /* dummy */ - writel(0x0200be01, SBBASE1); - } - - return 0; -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c b/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c deleted file mode 100644 index 0d9ffe153f..0000000000 --- a/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <linux/io.h> - -#include "../init.h" -#include "../sg-regs.h" -#include "sbc-regs.h" - -int proxstream2_sbc_init(const struct uniphier_board_data *bd) -{ - /* necessary for ROM boot ?? */ - /* system bus output enable */ - writel(0x17, PC0CTRL); - - /* - * Only CS1 is connected to support card. - * BKSZ[1:0] should be set to "01". - */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); - - if (boot_is_swapped()) { - /* - * Boot Swap On: boot from external NOR/SRAM - * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. - * - * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank - * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals - */ - writel(0x0000bc01, SBBASE0); - } else { - /* - * Boot Swap Off: boot from mask ROM - * 0x40000000-0x41ffffff: mask ROM - * 0x42000000-0x43efffff: memory bank (31MB) - * 0x43f00000-0x43ffffff: peripherals (1MB) - */ - writel(0x0000be01, SBBASE0); /* dummy */ - writel(0x0200be01, SBBASE1); - } - - return 0; -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c new file mode 100644 index 0000000000..acbf4c53fb --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2015-2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "sbc-regs.h" + +int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd) +{ + /* necessary for ROM boot ?? */ + /* system bus output enable */ + writel(0x17, PC0CTRL); + + return 0; +} diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h index 493363bb64..a5dca74a55 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-regs.h +++ b/arch/arm/mach-uniphier/sbc/sbc-regs.h @@ -74,27 +74,6 @@ #define SBCTRL73 SBCTRL(7, 3) #define SBCTRL74 (SBCTRL_BASE + 0x170) -/* slower but LED works */ -#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000 -#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00 -#define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009 -#define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110 - -/* faster but LED does not work */ -#define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000 -#define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700 -/* NOR flash needs more wait counts than SRAM */ -#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009 -#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210 - -#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000 -#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500 -#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020 - -#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000 -#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500 -#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010 - #define PC0CTRL 0x598000c0 #define ROM_BOOT_ROMRSV2 0x59801208 diff --git a/arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-savepin.c index fcce43cb99..e3e3daa688 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c +++ b/arch/arm/mach-uniphier/sbc/sbc-savepin.c @@ -1,25 +1,29 @@ /* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> #include <linux/io.h> #include "../init.h" -#include "../sg-regs.h" #include "sbc-regs.h" -int ph1_ld4_sbc_init(const struct uniphier_board_data *bd) -{ - u32 tmp; +/* slower but LED works */ +#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000 +#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00 +#define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009 +#define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110 - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); +/* faster but LED does not work */ +#define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000 +#define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700 +/* NOR flash needs more wait counts than SRAM */ +#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009 +#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210 +int sbc_savepin_init(const struct uniphier_board_data *bd) +{ /* * Only CS1 is connected to support card. * BKSZ[1:0] should be set to "01". diff --git a/arch/arm/mach-uniphier/sbc/sbc-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-sld3.c new file mode 100644 index 0000000000..ac9d0301be --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-sld3.c @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "../sg-regs.h" + +int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd) +{ + sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ + + return 0; +} diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index 474b82d243..a0955893ef 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -9,7 +9,7 @@ #ifndef ARCH_SC_REGS_H #define ARCH_SC_REGS_H -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) #define SC_BASE_ADDR 0xf1840000 #else #define SC_BASE_ADDR 0x61840000 diff --git a/arch/arm/mach-uniphier/sc64-regs.h b/arch/arm/mach-uniphier/sc64-regs.h new file mode 100644 index 0000000000..ef02830a1e --- /dev/null +++ b/arch/arm/mach-uniphier/sc64-regs.h @@ -0,0 +1,44 @@ +/* + * UniPhier SC (System Control) block registers for ARMv8 SoCs + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef SC64_REGS_H +#define SC64_REGS_H + +#define SC_BASE_ADDR 0x61840000 + +#define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) +#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) +#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) +#define SC_RSTCTRL4_ETHER (1 << 6) +#define SC_RSTCTRL4_NAND (1 << 0) +#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010) +#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) +#define SC_RSTCTRL7 (SC_BASE_ADDR | 0x2018) +#define SC_RSTCTRL7_UMCSB (1 << 16) +#define SC_RSTCTRL7_UMCA2 (1 << 10) +#define SC_RSTCTRL7_UMCA1 (1 << 9) +#define SC_RSTCTRL7_UMCA0 (1 << 8) +#define SC_RSTCTRL7_UMC32 (1 << 2) +#define SC_RSTCTRL7_UMC31 (1 << 1) +#define SC_RSTCTRL7_UMC30 (1 << 0) + +#define SC_CLKCTRL (SC_BASE_ADDR | 0x2100) +#define SC_CLKCTRL3 (SC_BASE_ADDR | 0x2108) +#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c) +#define SC_CLKCTRL4_PERI (1 << 7) +#define SC_CLKCTRL4_ETHER (1 << 6) +#define SC_CLKCTRL4_NAND (1 << 0) +#define SC_CLKCTRL5 (SC_BASE_ADDR | 0x2110) +#define SC_CLKCTRL6 (SC_BASE_ADDR | 0x2114) +#define SC_CLKCTRL7 (SC_BASE_ADDR | 0x2118) +#define SC_CLKCTRL7_UMCSB (1 << 16) +#define SC_CLKCTRL7_UMC32 (1 << 2) +#define SC_CLKCTRL7_UMC31 (1 << 1) +#define SC_CLKCTRL7_UMC30 (1 << 0) + +#endif /* SC64_REGS_H */ diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 3a535c70b2..2cdc2db26e 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -115,6 +115,17 @@ static inline void sg_set_pinsel(unsigned pin, unsigned muxval, writel(tmp, reg); } +static inline void sg_set_iectrl(unsigned pin) +{ + unsigned bit = pin % 32; + unsigned long reg = SG_IECTRL + pin / 32 * 4; + u32 tmp; + + tmp = readl(reg); + tmp |= 1 << bit; + writel(tmp, reg); +} + #endif /* __ASSEMBLY__ */ #endif /* ARCH_SG_REGS_H */ diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h index 606094c80f..d9b38b3d2d 100644 --- a/arch/arm/mach-uniphier/soc-info.h +++ b/arch/arm/mach-uniphier/soc-info.h @@ -8,28 +8,28 @@ #define __MACH_SOC_INFO_H__ enum uniphier_soc_id { - SOC_UNIPHIER_PH1_SLD3, - SOC_UNIPHIER_PH1_LD4, - SOC_UNIPHIER_PH1_PRO4, - SOC_UNIPHIER_PH1_SLD8, - SOC_UNIPHIER_PH1_PRO5, - SOC_UNIPHIER_PROXSTREAM2, - SOC_UNIPHIER_PH1_LD6B, - SOC_UNIPHIER_PH1_LD11, - SOC_UNIPHIER_PH1_LD20, + SOC_UNIPHIER_SLD3, + SOC_UNIPHIER_LD4, + SOC_UNIPHIER_PRO4, + SOC_UNIPHIER_SLD8, + SOC_UNIPHIER_PRO5, + SOC_UNIPHIER_PXS2, + SOC_UNIPHIER_LD6B, + SOC_UNIPHIER_LD11, + SOC_UNIPHIER_LD20, SOC_UNIPHIER_UNKNOWN, }; #define UNIPHIER_NR_ENABLED_SOCS \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD4) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD11) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD20) + IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD3) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD4) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO4) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD8) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO5) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PXS2) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD6B) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD11) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) #define UNIPHIER_MULTI_SOC ((UNIPHIER_NR_ENABLED_SOCS) > 1) @@ -38,32 +38,32 @@ enum uniphier_soc_id uniphier_get_soc_type(void); #else static inline enum uniphier_soc_id uniphier_get_soc_type(void) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - return SOC_UNIPHIER_PH1_SLD3; +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + return SOC_UNIPHIER_SLD3; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) - return SOC_UNIPHIER_PH1_LD4; +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + return SOC_UNIPHIER_LD4; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) - return SOC_UNIPHIER_PH1_PRO4; +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + return SOC_UNIPHIER_PRO4; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - return SOC_UNIPHIER_PH1_SLD8; +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + return SOC_UNIPHIER_SLD8; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - return SOC_UNIPHIER_PH1_PRO5; +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + return SOC_UNIPHIER_PRO5; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) - return SOC_UNIPHIER_PROXSTREAM2; +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + return SOC_UNIPHIER_PXS2; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - return SOC_UNIPHIER_PH1_LD6B; +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + return SOC_UNIPHIER_LD6B; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD11) - return SOC_UNIPHIER_PH1_LD11; +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + return SOC_UNIPHIER_LD11; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD20) - return SOC_UNIPHIER_PH1_LD20; +#if defined(CONFIG_ARCH_UNIPHIER_LD20) + return SOC_UNIPHIER_LD20; #endif return SOC_UNIPHIER_UNKNOWN; diff --git a/arch/arm/mach-uniphier/soc_info.c b/arch/arm/mach-uniphier/soc_info.c index 3cfc183723..046104bd78 100644 --- a/arch/arm/mach-uniphier/soc_info.c +++ b/arch/arm/mach-uniphier/soc_info.c @@ -17,49 +17,49 @@ enum uniphier_soc_id uniphier_get_soc_type(void) enum uniphier_soc_id ret; switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) { -#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 +#ifdef CONFIG_ARCH_UNIPHIER_SLD3 case 0x25: - ret = SOC_UNIPHIER_PH1_SLD3; + ret = SOC_UNIPHIER_SLD3; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD4 +#ifdef CONFIG_ARCH_UNIPHIER_LD4 case 0x26: - ret = SOC_UNIPHIER_PH1_LD4; + ret = SOC_UNIPHIER_LD4; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_PRO4 +#ifdef CONFIG_ARCH_UNIPHIER_PRO4 case 0x28: - ret = SOC_UNIPHIER_PH1_PRO4; + ret = SOC_UNIPHIER_PRO4; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD8 +#ifdef CONFIG_ARCH_UNIPHIER_SLD8 case 0x29: - ret = SOC_UNIPHIER_PH1_SLD8; + ret = SOC_UNIPHIER_SLD8; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_PRO5 +#ifdef CONFIG_ARCH_UNIPHIER_PRO5 case 0x2A: - ret = SOC_UNIPHIER_PH1_PRO5; + ret = SOC_UNIPHIER_PRO5; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PROXSTREAM2 +#ifdef CONFIG_ARCH_UNIPHIER_PXS2 case 0x2E: - ret = SOC_UNIPHIER_PROXSTREAM2; + ret = SOC_UNIPHIER_PXS2; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD6B +#ifdef CONFIG_ARCH_UNIPHIER_LD6B case 0x2F: - ret = SOC_UNIPHIER_PH1_LD6B; + ret = SOC_UNIPHIER_LD6B; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD11 +#ifdef CONFIG_ARCH_UNIPHIER_LD11 case 0x31: - ret = SOC_UNIPHIER_PH1_LD11; + ret = SOC_UNIPHIER_LD11; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD20 +#ifdef CONFIG_ARCH_UNIPHIER_LD20 case 0x32: - ret = SOC_UNIPHIER_PH1_LD20; + ret = SOC_UNIPHIER_LD20; break; #endif default: |