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-rw-r--r--arch/arm/cpu/armv7/mx5/clock.c4
-rw-r--r--arch/arm/cpu/armv7/mx5/lowlevel_init.S2
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c2
-rw-r--r--arch/arm/include/asm/arch-mx25/imx-regs.h1
-rw-r--r--arch/arm/include/asm/arch-mx31/imx-regs.h27
-rw-r--r--arch/arm/include/asm/arch-mx35/imx-regs.h2
-rw-r--r--arch/arm/include/asm/arch-mx5/mx5x_pins.h6
-rw-r--r--arch/arm/include/asm/arch-mxs/regs-power.h4
8 files changed, 15 insertions, 33 deletions
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 1c9223fa07..76c2c529a8 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -928,7 +928,9 @@ int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
printf("IPG PERCLK %8d kHz\n", mxc_get_clock(MXC_IPG_PERCLK) / 1000);
printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
-
+#ifdef CONFIG_MXC_SPI
+ printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
+#endif
return 0;
}
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 29ec95797b..6d9396a976 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -396,7 +396,7 @@ ENTRY(lowlevel_init)
mov r10, lr
mov r4, #0 /* Fix R4 to 0 */
-#if defined(CONFIG_MX51)
+#if defined(CONFIG_SYS_MAIN_PWR_ON)
ldr r0, =GPIO1_BASE_ADDR
ldr r1, [r0, #0x0]
orr r1, r1, #1 << 23
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index a01d96f48e..a50db70b19 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -404,7 +404,9 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf("\n");
printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
printf("UART %8d kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
+#ifdef CONFIG_MXC_SPI
printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
+#endif
printf("AHB %8d kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
printf("AXI %8d kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index 738d4115e9..5f4b543823 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -241,6 +241,7 @@ struct aips_regs {
#define IMX_RTIC_BASE (0x53FEC000)
#define IMX_IIM_BASE (0x53FF0000)
#define IMX_USB_BASE (0x53FF4000)
+#define IMX_USB_PORT_OFFSET 0x200
#define IMX_CSI_BASE (0x53FF8000)
#define IMX_DRYICE_BASE (0x53FFC000)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 8fd3d08069..ae3658b639 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -895,32 +895,7 @@ struct esdc_regs {
#define MX31_AIPS1_BASE_ADDR 0x43f00000
#define IMX_USB_BASE (MX31_AIPS1_BASE_ADDR + 0x88000)
-
-/* USB portsc */
-/* values for portsc field */
-#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23)
-#define MXC_EHCI_FORCE_FS (1 << 24)
-#define MXC_EHCI_UTMI_8BIT (0 << 28)
-#define MXC_EHCI_UTMI_16BIT (1 << 28)
-#define MXC_EHCI_SERIAL (1 << 29)
-#define MXC_EHCI_MODE_UTMI (0 << 30)
-#define MXC_EHCI_MODE_PHILIPS (1 << 30)
-#define MXC_EHCI_MODE_ULPI (2 << 30)
-#define MXC_EHCI_MODE_SERIAL (3 << 30)
-
-/* values for flags field */
-#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
-#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
-#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
-#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
-#define MXC_EHCI_INTERFACE_MASK (0xf)
-
-#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
-#define MXC_EHCI_TTL_ENABLED (1 << 6)
-
-#define MXC_EHCI_INTERNAL_PHY (1 << 7)
-#define MXC_EHCI_IPPUE_DOWN (1 << 8)
-#define MXC_EHCI_IPPUE_UP (1 << 9)
+#define IMX_USB_PORT_OFFSET 0x200
/*
* CSPI register definitions
diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h
index 7b6475a5ef..18c6816e48 100644
--- a/arch/arm/include/asm/arch-mx35/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx35/imx-regs.h
@@ -84,6 +84,8 @@
#define PWM_BASE_ADDR 0x53FE0000
#define RTIC_BASE_ADDR 0x53FEC000
#define IIM_BASE_ADDR 0x53FF0000
+#define IMX_USB_BASE 0x53FF4000
+#define IMX_USB_PORT_OFFSET 0x400
#define IMX_CCM_BASE CCM_BASE_ADDR
diff --git a/arch/arm/include/asm/arch-mx5/mx5x_pins.h b/arch/arm/include/asm/arch-mx5/mx5x_pins.h
index 122fbeef6a..3457f6a632 100644
--- a/arch/arm/include/asm/arch-mx5/mx5x_pins.h
+++ b/arch/arm/include/asm/arch-mx5/mx5x_pins.h
@@ -802,22 +802,22 @@ typedef enum iomux_input_select {
MX53_CSPI_IPP_CSPI_CLK_IN_SELECT_INPUT,
MX53_CSPI_IPP_IND_MISO_SELECT_INPUT,
MX53_CSPI_IPP_IND_MOSI_SELECT_INPUT,
+ MX53_CSPI_IPP_IND_SS_B_0_SELECT_INPUT,
MX53_CSPI_IPP_IND_SS_B_1_SELECT_INPUT,
MX53_CSPI_IPP_IND_SS_B_2_SELECT_INPUT,
MX53_CSPI_IPP_IND_SS_B_3_SELECT_INPUT,
- MX53_CSPI_IPP_IND_SS_B_4_SELECT_INPUT,
MX53_ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT,
MX53_ECSPI1_IPP_IND_MISO_SELECT_INPUT,
MX53_ECSPI1_IPP_IND_MOSI_SELECT_INPUT,
+ MX53_ECSPI1_IPP_IND_SS_B_0_SELECT_INPUT,
MX53_ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT,
MX53_ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT,
MX53_ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT,
- MX53_ECSPI1_IPP_IND_SS_B_4_SELECT_INPUT,
MX53_ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT,
MX53_ECSPI2_IPP_IND_MISO_SELECT_INPUT,
MX53_ECSPI2_IPP_IND_MOSI_SELECT_INPUT,
+ MX53_ECSPI2_IPP_IND_SS_B_0_SELECT_INPUT,
MX53_ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT,
- MX53_ECSPI2_IPP_IND_SS_B_2_SELECT_INPUT,
MX53_ESAI1_IPP_IND_FSR_SELECT_INPUT,
MX53_ESAI1_IPP_IND_FST_SELECT_INPUT,
MX53_ESAI1_IPP_IND_HCKR_SELECT_INPUT,
diff --git a/arch/arm/include/asm/arch-mxs/regs-power.h b/arch/arm/include/asm/arch-mxs/regs-power.h
index a46a372682..257ee88e82 100644
--- a/arch/arm/include/asm/arch-mxs/regs-power.h
+++ b/arch/arm/include/asm/arch-mxs/regs-power.h
@@ -128,7 +128,7 @@ struct mxs_power_regs {
#define POWER_MINPWR_PWD_ANA_CMPS (1 << 10)
#define POWER_MINPWR_ENABLE_OSC (1 << 9)
#define POWER_MINPWR_SELECT_OSC (1 << 8)
-#define POWER_MINPWR_FBG_OFF (1 << 7)
+#define POWER_MINPWR_VBG_OFF (1 << 7)
#define POWER_MINPWR_DOUBLE_FETS (1 << 6)
#define POWER_MINPWR_HALFFETS (1 << 5)
#define POWER_MINPWR_LESSANA_I (1 << 4)
@@ -268,7 +268,7 @@ struct mxs_power_regs {
#define POWER_DCLIMITS_POSLIMIT_BUCK_MASK (0x7f << 8)
#define POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET 8
#define POWER_DCLIMITS_NEGLIMIT_MASK 0x7f
-#define POWER_DCLIMITS_NETLIMIT_OFFSET 0
+#define POWER_DCLIMITS_NEGLIMIT_OFFSET 0
#define POWER_LOOPCTRL_TOGGLE_DIF (1 << 20)
#define POWER_LOOPCTRL_HYST_SIGN (1 << 19)
generated by cgit (git 2.34.1) at 2024-12-29 06:21:26 +0000