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-rw-r--r--arch/arm/include/asm/arch-stm32f7/rcc.h1
-rw-r--r--arch/arm/include/asm/arch-stm32f7/stm32_periph.h6
-rw-r--r--arch/arm/mach-stm32/stm32f7/clock.c3
3 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-stm32f7/rcc.h b/arch/arm/include/asm/arch-stm32f7/rcc.h
index 23eec5efb6..0f8d50b4c6 100644
--- a/arch/arm/include/asm/arch-stm32f7/rcc.h
+++ b/arch/arm/include/asm/arch-stm32f7/rcc.h
@@ -31,6 +31,7 @@
* RCC AHB3ENR specific definitions
*/
#define RCC_AHB3ENR_FMC_EN BIT(0)
+#define RCC_AHB3ENR_QSPI_EN BIT(1)
/*
* RCC APB1ENR specific definitions
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
index 508b5f2716..3c5604ae29 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
@@ -15,8 +15,9 @@
*
*/
enum periph_id {
- UART1_GPIOA_9_10 = 0,
- UART2_GPIOD_5_6,
+ PERIPH_ID_USART1 = 37,
+
+ PERIPH_ID_QUADSPI = 92,
};
enum periph_clock {
@@ -37,6 +38,7 @@ enum periph_clock {
TIMER2_CLOCK_CFG,
FMC_CLOCK_CFG,
STMMAC_CLOCK_CFG,
+ QSPI_CLOCK_CFG,
};
#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/arch/arm/mach-stm32/stm32f7/clock.c b/arch/arm/mach-stm32/stm32f7/clock.c
index 8b3d3fd73a..e1ee1731f7 100644
--- a/arch/arm/mach-stm32/stm32f7/clock.c
+++ b/arch/arm/mach-stm32/stm32f7/clock.c
@@ -266,6 +266,9 @@ void clock_setup(int peripheral)
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
break;
+ case QSPI_CLOCK_CFG:
+ setbits_le32(&STM32_RCC->ahb3enr, RCC_AHB3ENR_QSPI_EN);
+ break;
default:
break;
}