3 files changed, 24 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 7ea7199f2b..0c99bbdc93 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -370,13 +370,6 @@
 #define DPLL_NO_LOCK	0
 #define DPLL_LOCK	1
 
-/*
- * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
- * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
- * into microsec and passing the value.
- */
-#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC	31219
-
 #if defined(CONFIG_DRA7XX)
 #define V_OSCK			20000000	/* Clock output from T2 */
 #else
diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig
index c89c438305..1a66abdeb2 100644
--- a/arch/arm/mach-omap2/omap5/Kconfig
+++ b/arch/arm/mach-omap2/omap5/Kconfig
@@ -63,6 +63,23 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
 	  using hardware memory firewalls. This value must be smaller than the
 	  TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
 
+config OMAP_PLATFORM_RESET_TIME_MAX_USEC
+	int "Something"
+	range 0  31219
+	default 31219
+	help
+	  Most OMAPs' provide a way to specify the time for which the reset
+	  should be held low while the voltages and Oscillator outputs
+	  stabilize.
+	  This time is mostly board and PMIC dependent. Hence the boards are
+	  expected to specify a pre-computed time using the above option.
+	  This value can be computed using a summation of the below 3
+	  parameters
+	  1: Time taken by the Osciallator to stop and restart
+	  2: PMIC OTP time
+	  3: Voltage ramp time, which can be derived using the PMIC slew rate
+	     and value of voltage ramp needed.
+
 if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
 menu "Voltage Domain OPP selections"
 
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c
index 839d79d102..afe59e0b58 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -414,12 +414,13 @@ void setup_warmreset_time(void)
 {
 	u32 rst_time, rst_val;
 
-#ifndef CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
-	rst_time = CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC;
-#else
-	rst_time = CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC;
-#endif
-	rst_time = usec_to_32k(rst_time) << RSTTIME1_SHIFT;
+	/*
+	 * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
+	 * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
+	 * into microsec and passing the value.
+	 */
+	rst_time = usec_to_32k(CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC)
+		<< RSTTIME1_SHIFT;
 
 	if (rst_time > RSTTIME1_MASK)
 		rst_time = RSTTIME1_MASK;