summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/tegra186.dtsi23
-rw-r--r--arch/arm/mach-mvebu/cpu.c9
-rw-r--r--arch/arm/mach-mvebu/include/mach/soc.h2
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c2
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c39
5 files changed, 41 insertions, 34 deletions
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index d9e7f0351f..f878b65325 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -45,7 +45,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C1>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C1>;
reset-names = "i2c";
status = "disabled";
@@ -58,7 +58,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C3>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C3>;
reset-names = "i2c";
status = "disabled";
@@ -71,7 +71,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C4>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C4>;
reset-names = "i2c";
status = "disabled";
@@ -84,7 +84,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C6>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C6>;
reset-names = "i2c";
status = "disabled";
@@ -97,7 +97,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C7>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C7>;
reset-names = "i2c";
status = "disabled";
@@ -110,7 +110,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C9>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C9>;
reset-names = "i2c";
status = "disabled";
@@ -120,9 +120,8 @@
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03400000 0x0 0x200>;
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
- reset-names = "sdmmc";
+ reset-names = "sdhci";
clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
- clock-names = "sdmmc";
interrupts = <GIC_SPI 62 0x04>;
status = "disabled";
};
@@ -131,9 +130,8 @@
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03460000 0x0 0x200>;
resets = <&bpmp TEGRA186_RESET_SDMMC4>;
- reset-names = "sdmmc";
+ reset-names = "sdhci";
clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
- clock-names = "sdmmc";
interrupts = <GIC_SPI 31 0x04>;
status = "disabled";
};
@@ -166,7 +164,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C2>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C2>;
reset-names = "i2c";
status = "disabled";
@@ -179,7 +177,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C8>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C8>;
reset-names = "i2c";
status = "disabled";
@@ -311,7 +309,6 @@
bpmp_i2c: i2c {
compatible = "nvidia,tegra186-bpmp-i2c";
- nvidia,bpmp = <&bpmp>;
nvidia,bpmp-bus-id = <5>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index fd66f59392..5eb2a398d1 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -452,8 +452,15 @@ int arch_cpu_init(void)
u32 mvebu_get_nand_clock(void)
{
+ u32 reg;
+
+ if (mvebu_soc_family() == MVEBU_SOC_A38X)
+ reg = MVEBU_DFX_DIV_CLK_CTRL(1);
+ else
+ reg = MVEBU_CORE_DIV_CLK_CTRL(1);
+
return CONFIG_SYS_MVEBU_PLL_CLOCK /
- ((readl(MVEBU_CORE_DIV_CLK_CTRL(1)) &
+ ((readl(reg) &
NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS);
}
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 13c9f29c14..6342cdc35c 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -73,6 +73,7 @@
#define MVEBU_NAND_BASE (MVEBU_REGISTER(0xd0000))
#define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000))
#define MVEBU_LCD_BASE (MVEBU_REGISTER(0xe0000))
+#define MVEBU_DFX_BASE (MVEBU_REGISTER(0xe4000))
#define SOC_COHERENCY_FABRIC_CTRL_REG (MVEBU_REGISTER(0x20200))
#define MBUS_ERR_PROP_EN (1 << 8)
@@ -92,6 +93,7 @@
#define SPI_PUP_EN BIT(5)
#define MVEBU_CORE_DIV_CLK_CTRL(i) (MVEBU_CLOCK_BASE + ((i) * 0x8))
+#define MVEBU_DFX_DIV_CLK_CTRL(i) (MVEBU_DFX_BASE + 0x250 + ((i) * 0x4))
#define NAND_ECC_DIVCKL_RATIO_OFFS 8
#define NAND_ECC_DIVCKL_RATIO_MASK (0x3F << NAND_ECC_DIVCKL_RATIO_OFFS)
diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
index 06a7715773..98c447ce94 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
@@ -184,7 +184,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
DEBUG_INIT_S("PCIe, Idx ");
DEBUG_INIT_D(pex_idx, 1);
DEBUG_INIT_S
- (": Link upgraded to Gen2 based on client cpabilities\n");
+ (": Link upgraded to Gen2 based on client capabilities\n");
}
/* Update pex DEVICE ID */
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 7d671997cb..820219e68e 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -835,25 +835,26 @@ u32 hws_serdes_topology_verify(enum serdes_type serdes_type, u32 serdes_id,
}
} else {
test_result = SERDES_ALREADY_IN_USE;
- if (test_result == SERDES_ALREADY_IN_USE) {
- printf("%s: Error: serdes lane %d is configured to type %s: type already in use\n",
- __func__, serdes_id,
- serdes_type_to_string[serdes_type]);
- return MV_FAIL;
- } else if (test_result == WRONG_NUMBER_OF_UNITS) {
- printf("%s: Warning: serdes lane %d is set to type %s.\n",
- __func__, serdes_id,
- serdes_type_to_string[serdes_type]);
- printf("%s: Maximum supported lanes are already set to this type (limit = %d)\n",
- __func__, serd_max_num);
- return MV_FAIL;
- } else if (test_result == UNIT_NUMBER_VIOLATION) {
- printf("%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.\n",
- __func__, serdes_id,
- serdes_type_to_string[serdes_type],
- serd_max_num);
- return MV_FAIL;
- }
+ }
+
+ if (test_result == SERDES_ALREADY_IN_USE) {
+ printf("%s: Error: serdes lane %d is configured to type %s: type already in use\n",
+ __func__, serdes_id,
+ serdes_type_to_string[serdes_type]);
+ return MV_FAIL;
+ } else if (test_result == WRONG_NUMBER_OF_UNITS) {
+ printf("%s: Warning: serdes lane %d is set to type %s.\n",
+ __func__, serdes_id,
+ serdes_type_to_string[serdes_type]);
+ printf("%s: Maximum supported lanes are already set to this type (limit = %d)\n",
+ __func__, serd_max_num);
+ return MV_FAIL;
+ } else if (test_result == UNIT_NUMBER_VIOLATION) {
+ printf("%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.\n",
+ __func__, serdes_id,
+ serdes_type_to_string[serdes_type],
+ serd_max_num);
+ return MV_FAIL;
}
return MV_OK;
generated by cgit (git 2.34.1) at 2024-12-26 14:35:06 +0000