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-rw-r--r--arch/arm/cpu/armv7/omap-common/sata.c8
-rw-r--r--arch/arm/include/asm/arch-keystone/clock_defs.h10
2 files changed, 12 insertions, 6 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c b/arch/arm/cpu/armv7/omap-common/sata.c
index cad4feed00..3b4dd3f5d7 100644
--- a/arch/arm/cpu/armv7/omap-common/sata.c
+++ b/arch/arm/cpu/armv7/omap-common/sata.c
@@ -70,7 +70,13 @@ int init_sata(int dev)
writel(val, TI_SATA_WRAPPER_BASE + TI_SATA_SYSCONFIG);
ret = ahci_init(DWC_AHSATA_BASE);
- scsi_scan(1);
return ret;
}
+
+/* On OMAP platforms SATA provides the SCSI subsystem */
+void scsi_init(void)
+{
+ init_sata(0);
+ scsi_scan(1);
+}
diff --git a/arch/arm/include/asm/arch-keystone/clock_defs.h b/arch/arm/include/asm/arch-keystone/clock_defs.h
index e545341ca7..85a046b89a 100644
--- a/arch/arm/include/asm/arch-keystone/clock_defs.h
+++ b/arch/arm/include/asm/arch-keystone/clock_defs.h
@@ -102,10 +102,10 @@ static struct pllctl_regs *pllctl_regs[] = {
#define PLL_BWADJ_LO_SMASK (PLL_BWADJ_LO_MASK << PLL_BWADJ_LO_SHIFT)
#define PLL_BWADJ_HI_MASK 0xf
-#define PLLM_RATIO_DIV1 (PLLDIV_ENABLE | 0)
-#define PLLM_RATIO_DIV2 (PLLDIV_ENABLE | 0)
-#define PLLM_RATIO_DIV3 (PLLDIV_ENABLE | 1)
-#define PLLM_RATIO_DIV4 (PLLDIV_ENABLE | 4)
-#define PLLM_RATIO_DIV5 (PLLDIV_ENABLE | 17)
+#define PLLM_RATIO_DIV1 (PLLDIV_ENABLE | 0x0)
+#define PLLM_RATIO_DIV2 (PLLDIV_ENABLE | 0x0)
+#define PLLM_RATIO_DIV3 (PLLDIV_ENABLE | 0x1)
+#define PLLM_RATIO_DIV4 (PLLDIV_ENABLE | 0x4)
+#define PLLM_RATIO_DIV5 (PLLDIV_ENABLE | 0x17)
#endif /* _CLOCK_DEFS_H_ */