diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/tegra20-colibri.dts | 117 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/arm64-mmu.c | 2 |
2 files changed, 76 insertions, 43 deletions
diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index 777f63e5bd..89adfb6041 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -14,42 +14,35 @@ i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; i2c2 = "/i2c@7000c400"; - usb0 = "/usb@c5008000"; - usb1 = "/usb@c5000000"; - usb2 = "/usb@c5004000"; mmc0 = "/sdhci@c8000600"; + usb0 = "/usb@c5000000"; + usb1 = "/usb@c5004000"; /* on-module only, for ASIX */ + usb2 = "/usb@c5008000"; }; host1x@50000000 { - status = "okay"; dc@54200000 { - status = "okay"; rgb { status = "okay"; nvidia,panel = <&lcd_panel>; + display-timings { + timing@0 { + /* VESA VGA */ + clock-frequency = <25175000>; + hactive = <640>; + vactive = <480>; + hback-porch = <48>; + hfront-porch = <16>; + hsync-len = <96>; + vback-porch = <31>; + vfront-porch = <11>; + vsync-len = <2>; + }; + }; }; }; }; - usb@c5000000 { - statuc = "okay"; - dr_mode = "otg"; - }; - - usb@c5004000 { - statuc = "okay"; - /* VBUS_LAN */ - nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) - GPIO_ACTIVE_LOW>; - nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>; - }; - - usb@c5008000 { - statuc = "okay"; - /* USBH_PEN */ - nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; - }; - nand-controller@70008000 { nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>; nvidia,width = <8>; @@ -61,6 +54,10 @@ }; }; + pwm@7000a000 { + status = "okay"; + }; + /* * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier * board) @@ -86,12 +83,45 @@ clock-frequency = <100000>; }; + /* EHCI instance 0: USB1_DP/N -> USBC_P/N */ + usb@c5000000 { + status = "okay"; + dr_mode = "otg"; + }; + + /* EHCI instance 1: ULPI -> USB3340 -> AX88772B */ + usb@c5004000 { + status = "okay"; + /* VBUS_LAN */ + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>; + }; + + /* EHCI instance 2: USB3_DP/N -> USBH_P/N */ + usb@c5008000 { + status = "okay"; + /* USBH_PEN */ + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + }; + sdhci@c8000600 { status = "okay"; bus-width = <4>; cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; }; + backlight: backlight { + compatible = "pwm-backlight"; + + brightness-levels = <255 128 64 32 16 8 4 0>; + default-brightness-level = <6>; + /* BL_ON */ + enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>; + power-supply = <®_3v3>; + /* PWM<A> */ + pwms = <&pwm 0 5000000>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; @@ -105,25 +135,28 @@ }; }; - pwm: pwm@7000a000 { - status = "okay"; + lcd_panel: panel { + /* + * edt,et057090dhu: EDT 5.7" LCD TFT + * edt,et070080dh6: EDT 7.0" LCD TFT + */ + compatible = "edt,et057090dhu", "simple-panel"; + + backlight = <&backlight>; }; - lcd_panel: panel { - clock = <25175000>; - xres = <640>; - yres = <480>; - left-margin = <48>; /* horizontal back porch */ - right-margin = <16>; /* horizontal front porch */ - hsync-len = <96>; - lower-margin = <11>; /* vertical front porch */ - upper-margin = <31>; /* vertical back porch */ - vsync-len = <2>; - hsync-active-high; - vsync-active-high; - nvidia,bits-per-pixel = <16>; - nvidia,pwm = <&pwm 0 0>; - nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>; - nvidia,panel-timings = <0 0 0 0>; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_3v3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "+V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; }; }; diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c index 7b1d258ed8..a79a5192e0 100644 --- a/arch/arm/mach-tegra/arm64-mmu.c +++ b/arch/arm/mach-tegra/arm64-mmu.c @@ -23,7 +23,7 @@ static struct mm_region tegra_mem_map[] = { }, { .virt = 0x80000000UL, .phys = 0x80000000UL, - .size = 0xff80000000UL, + .size = 0x80000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { |