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-rw-r--r--arch/arm/cpu/armv7/am33xx/board.c1
-rw-r--r--arch/arm/cpu/armv7/keystone/init.c33
-rw-r--r--arch/arm/cpu/armv7/omap-common/boot-common.c9
-rw-r--r--arch/arm/cpu/armv7/omap-common/sata.c6
-rw-r--r--arch/arm/cpu/armv7/omap-common/timer.c5
-rw-r--r--arch/arm/cpu/armv7/omap4/sdram_elpida.c4
-rw-r--r--arch/arm/cpu/armv7/socfpga/lowlevel_init.S7
-rw-r--r--arch/arm/cpu/armv7/virt-dt.c2
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware.h1
-rw-r--r--arch/arm/include/asm/arch-omap4/sys_proto.h3
-rw-r--r--arch/arm/include/asm/armv7.h1
-rw-r--r--arch/arm/lib/bootm.c4
12 files changed, 57 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index 29b1d73438..eaf09d1a62 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -294,7 +294,6 @@ void s_init(void)
save_omap_boot_params();
#endif
watchdog_disable();
- timer_init();
set_uart_mux_conf();
setup_clocks_for_console();
uart_soft_reset();
diff --git a/arch/arm/cpu/armv7/keystone/init.c b/arch/arm/cpu/armv7/keystone/init.c
index c2b947839d..c96845c4e2 100644
--- a/arch/arm/cpu/armv7/keystone/init.c
+++ b/arch/arm/cpu/armv7/keystone/init.c
@@ -15,6 +15,16 @@
#include <asm/arch/hardware.h>
#include <asm/arch/psc_defs.h>
+#define MAX_PCI_PORTS 2
+enum pci_mode {
+ ENDPOINT,
+ LEGACY_ENDPOINT,
+ ROOTCOMPLEX,
+};
+
+#define DEVCFG_MODE_MASK (BIT(2) | BIT(1))
+#define DEVCFG_MODE_SHIFT 1
+
void chip_configuration_unlock(void)
{
__raw_writel(KS2_KICK0_MAGIC, KS2_KICK0);
@@ -68,6 +78,24 @@ void osr_init(void)
}
#endif
+/* Function to set up PCIe mode */
+static void config_pcie_mode(int pcie_port, enum pci_mode mode)
+{
+ u32 val = __raw_readl(KS2_DEVCFG);
+
+ if (pcie_port >= MAX_PCI_PORTS)
+ return;
+
+ /**
+ * each pci port has two bits for mode and it starts at
+ * bit 1. So use port number to get the right bit position.
+ */
+ pcie_port <<= 1;
+ val &= ~(DEVCFG_MODE_MASK << pcie_port);
+ val |= ((mode << DEVCFG_MODE_SHIFT) << pcie_port);
+ __raw_writel(val, KS2_DEVCFG);
+}
+
int arch_cpu_init(void)
{
chip_configuration_unlock();
@@ -77,8 +105,13 @@ int arch_cpu_init(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_NETCP);
msmc_share_all_segments(KS2_MSMC_SEGMENT_QM_PDSP);
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE0);
+
+ /* Initialize the PCIe-0 to work as Root Complex */
+ config_pcie_mode(0, ROOTCOMPLEX);
#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L)
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE1);
+ /* Initialize the PCIe-1 to work as Root Complex */
+ config_pcie_mode(1, ROOTCOMPLEX);
#endif
#ifdef CONFIG_SOC_K2L
osr_init();
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c
index cb18908867..00a108212a 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -9,12 +9,14 @@
*/
#include <common.h>
+#include <ahci.h>
#include <spl.h>
#include <asm/omap_common.h>
#include <asm/arch/omap.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <watchdog.h>
+#include <scsi.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -143,3 +145,10 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
image_entry((u32 *)&gd->arch.omap_boot_params);
}
#endif
+
+#ifdef CONFIG_SCSI_AHCI_PLAT
+void arch_preboot_os(void)
+{
+ ahci_reset(DWC_AHSATA_BASE);
+}
+#endif
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c b/arch/arm/cpu/armv7/omap-common/sata.c
index a24baa1337..d18bc50c5a 100644
--- a/arch/arm/cpu/armv7/omap-common/sata.c
+++ b/arch/arm/cpu/armv7/omap-common/sata.c
@@ -85,3 +85,9 @@ void scsi_init(void)
init_sata(0);
scsi_scan(1);
}
+
+void scsi_bus_reset(void)
+{
+ ahci_reset(DWC_AHSATA_BASE);
+ ahci_init(DWC_AHSATA_BASE);
+}
diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c
index 7c9924dc39..032bd2c24f 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -41,11 +41,6 @@ int timer_init(void)
writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
&timer_base->tclr);
- /* reset time, capture current incrementer value time */
- gd->arch.lastinc = readl(&timer_base->tcrr) /
- (TIMER_CLOCK / CONFIG_SYS_HZ);
- gd->arch.tbl = 0; /* start "advancing" time stamp from 0 */
-
return 0;
}
diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
index 6903696e1b..4462c72c7a 100644
--- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
+++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
@@ -121,8 +121,6 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
*regs = &emif_regs_elpida_380_mhz_1cs;
else if (omap4_rev == OMAP4430_ES2_0)
*regs = &emif_regs_elpida_200_mhz_2cs;
- else if (omap4_rev == OMAP4430_ES2_3)
- *regs = &emif_regs_elpida_400_mhz_1cs;
else if (omap4_rev < OMAP4470_ES1_0)
*regs = &emif_regs_elpida_400_mhz_2cs;
else
@@ -138,8 +136,6 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
if (omap_rev == OMAP4430_ES1_0)
*dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
- else if (omap_rev == OMAP4430_ES2_3)
- *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
else if (omap_rev < OMAP4460_ES1_0)
*dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
else
diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
index 2f2e9fcc7c..afed773c63 100644
--- a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
@@ -7,13 +7,6 @@
#include <config.h>
#include <version.h>
-/* Save the parameter pass in by previous boot loader */
-.global save_boot_params
-save_boot_params:
- /* no parameter to save */
- bx lr
-
-
/* Set up the platform, once the cpu has been initialized */
.globl lowlevel_init
lowlevel_init:
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index 0b0d6a76fc..ad19e4c47c 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -90,6 +90,8 @@ static int fdt_psci(void *fdt)
int armv7_update_dt(void *fdt)
{
+ if (!armv7_boot_nonsec())
+ return 0;
#ifndef CONFIG_ARMV7_SECURE_BASE
/* secure code lives in RAM, keep it alive */
fdt_add_mem_rsv(fdt, (unsigned long)__secure_start,
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h
index be22bdb1ca..16cbcee12b 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -144,6 +144,7 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_DEVICE_STATE_CTRL_BASE 0x02620000
#define KS2_JTAG_ID_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x18)
#define KS2_DEVSTAT (KS2_DEVICE_STATE_CTRL_BASE + 0x20)
+#define KS2_DEVCFG (KS2_DEVICE_STATE_CTRL_BASE + 0x14c)
/* PSC */
#define KS2_PSC_BASE 0x02350000
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index 83d858f305..e19975efaf 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -22,6 +22,9 @@ extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
+extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2;
+extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2;
+extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2;
struct omap_sysinfo {
char *board_string;
};
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 323f282fb7..a13da23cf1 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -80,6 +80,7 @@ void v7_outer_cache_inval_range(u32 start, u32 end);
int armv7_init_nonsec(void);
int armv7_update_dt(void *fdt);
+bool armv7_boot_nonsec(void);
/* defined in assembly file */
unsigned int _nonsec_init(void);
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index a7f7c67997..0c1298a31e 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -238,7 +238,7 @@ static void boot_prep_linux(bootm_headers_t *images)
}
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
-static bool boot_nonsec(void)
+bool armv7_boot_nonsec(void)
{
char *s = getenv("bootm_boot_mode");
#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
@@ -305,7 +305,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
if (!fake) {
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
- if (boot_nonsec()) {
+ if (armv7_boot_nonsec()) {
armv7_init_nonsec();
secure_ram_addr(_do_nonsec_entry)(kernel_entry,
0, machid, r2);
generated by cgit (git 2.34.1) at 2025-01-29 21:35:35 +0000