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-rw-r--r--arch/microblaze/cpu/Makefile1
-rw-r--r--arch/microblaze/cpu/exception.c3
-rw-r--r--arch/microblaze/cpu/spl.c55
-rw-r--r--arch/microblaze/cpu/start.S12
-rw-r--r--arch/microblaze/cpu/timer.c8
-rw-r--r--arch/microblaze/cpu/u-boot-spl.lds57
-rw-r--r--arch/microblaze/dts/.gitignore1
-rw-r--r--arch/microblaze/dts/Makefile11
-rw-r--r--arch/microblaze/dts/microblaze-generic.dts7
-rw-r--r--arch/microblaze/include/asm/spl.h16
-rw-r--r--arch/microblaze/include/asm/u-boot.h1
-rw-r--r--arch/microblaze/lib/board.c20
-rw-r--r--arch/microblaze/lib/time.c0
13 files changed, 189 insertions, 3 deletions
diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile
index 6e201f2d54..4955e81236 100644
--- a/arch/microblaze/cpu/Makefile
+++ b/arch/microblaze/cpu/Makefile
@@ -8,3 +8,4 @@
extra-y = start.o
obj-y = irq.o
obj-y += cpu.o interrupts.o cache.o exception.o timer.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c
index 9218355ae1..227842f6a4 100644
--- a/arch/microblaze/cpu/exception.c
+++ b/arch/microblaze/cpu/exception.c
@@ -35,6 +35,9 @@ void _hw_exception_handler (void)
puts ("Divide by zero exception\n");
break;
#ifdef MICROBLAZE_V5
+ case 0x7:
+ puts("Priviledged or stack protection violation exception\n");
+ break;
case 0x1000:
puts ("Exception in delay slot\n");
break;
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
new file mode 100644
index 0000000000..091226133e
--- /dev/null
+++ b/arch/microblaze/cpu/spl.c
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2013 - 2014 Xilinx, Inc
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <image.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/u-boot.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+bool boot_linux;
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_NOR;
+}
+
+/* Board initialization after bss clearance */
+void spl_board_init(void)
+{
+ gd = (gd_t *)CONFIG_SPL_STACK_ADDR;
+
+ /* enable console uart printing */
+ preloader_console_init();
+}
+
+#ifdef CONFIG_SPL_OS_BOOT
+void __noreturn jump_to_image_linux(void *arg)
+{
+ debug("Entering kernel arg pointer: 0x%p\n", arg);
+ typedef void (*image_entry_arg_t)(char *, ulong, ulong)
+ __attribute__ ((noreturn));
+ image_entry_arg_t image_entry =
+ (image_entry_arg_t)spl_image.entry_point;
+
+ image_entry(NULL, 0, (ulong)arg);
+}
+#endif /* CONFIG_SPL_OS_BOOT */
+
+int spl_start_uboot(void)
+{
+#ifdef CONFIG_SPL_OS_BOOT
+ if (boot_linux)
+ return 0;
+#endif
+
+ return 1;
+}
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 8928024838..1757bbfa94 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -22,6 +22,11 @@ _start:
*/
mts rmsr, r0 /* disable cache */
+
+#if defined(CONFIG_SPL_BUILD)
+ addi r1, r0, CONFIG_SPL_STACK_ADDR
+ addi r1, r1, -4 /* Decrement SP to top of memory */
+#else
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
addi r1, r1, -4 /* Decrement SP to top of memory */
@@ -115,6 +120,7 @@ _start:
sh r7, r0, r8
rsubi r8, r10, 0x26
sh r6, r0, r8
+#endif /* BUILD_SPL */
/* Flush cache before enable cache */
addik r5, r0, 0
@@ -139,9 +145,14 @@ clear_bss:
cmp r6, r5, r4 /* check if we have reach the end */
bnei r6, 2b
3: /* jumping to board_init */
+#ifndef CONFIG_SPL_BUILD
brai board_init_f
+#else
+ brai board_init_r
+#endif
1: bri 1b
+#ifndef CONFIG_SPL_BUILD
/*
* Read 16bit little endian
*/
@@ -174,3 +185,4 @@ out16: bslli r3, r6, 8
rtsd r15, 8
or r0, r0, r0
.end out16
+#endif
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index 69ae6d4d87..3960bbb08a 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -34,6 +34,7 @@ void __udelay(unsigned long usec)
}
}
+#ifndef CONFIG_SPL_BUILD
static void timer_isr(void *arg)
{
timestamp++;
@@ -62,10 +63,15 @@ int timer_init (void)
if (ret)
tmr = NULL;
}
-
/* No problem if timer is not found/initialized */
return 0;
}
+#else
+int timer_init(void)
+{
+ return 0;
+}
+#endif
/*
* This function is derived from PowerPC code (read timebase as long long).
diff --git a/arch/microblaze/cpu/u-boot-spl.lds b/arch/microblaze/cpu/u-boot-spl.lds
new file mode 100644
index 0000000000..96353cd96c
--- /dev/null
+++ b/arch/microblaze/cpu/u-boot-spl.lds
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2013 - 2014 Xilinx, Inc
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+
+OUTPUT_ARCH(microblaze)
+ENTRY(_start)
+
+SECTIONS
+{
+ .text ALIGN(0x4):
+ {
+ __text_start = .;
+ arch/microblaze/cpu/start.o (.text)
+ *(.text)
+ *(.text.*)
+ __text_end = .;
+ }
+
+ .rodata ALIGN(0x4):
+ {
+ __rodata_start = .;
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ __rodata_end = .;
+ }
+
+ .data ALIGN(0x4):
+ {
+ __data_start = .;
+ *(.data)
+ *(.data.*)
+ __data_end = .;
+ }
+
+ .bss ALIGN(0x4):
+ {
+ __bss_start = .;
+ *(.sbss)
+ *(.scommon)
+ *(.bss)
+ *(.bss.*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end = .;
+ }
+ __end = . ;
+}
+
+#if defined(CONFIG_SPL_MAX_FOOTPRINT)
+ASSERT(__end - _start < (CONFIG_SPL_MAX_FOOTPRINT), \
+ "SPL image plus BSS too big");
+#endif
diff --git a/arch/microblaze/dts/.gitignore b/arch/microblaze/dts/.gitignore
new file mode 100644
index 0000000000..b60ed208c7
--- /dev/null
+++ b/arch/microblaze/dts/.gitignore
@@ -0,0 +1 @@
+*.dtb
diff --git a/arch/microblaze/dts/Makefile b/arch/microblaze/dts/Makefile
new file mode 100644
index 0000000000..6d4a11f62f
--- /dev/null
+++ b/arch/microblaze/dts/Makefile
@@ -0,0 +1,11 @@
+dtb-y += microblaze-generic.dtb
+
+targets += $(dtb-y)
+
+DTC_FLAGS += -R 4 -p 0x1000
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+ @:
+
+clean-files := *.dtb
diff --git a/arch/microblaze/dts/microblaze-generic.dts b/arch/microblaze/dts/microblaze-generic.dts
new file mode 100644
index 0000000000..203330987b
--- /dev/null
+++ b/arch/microblaze/dts/microblaze-generic.dts
@@ -0,0 +1,7 @@
+/dts-v1/;
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ aliases {
+ } ;
+} ;
diff --git a/arch/microblaze/include/asm/spl.h b/arch/microblaze/include/asm/spl.h
new file mode 100644
index 0000000000..c1cae6cf0f
--- /dev/null
+++ b/arch/microblaze/include/asm/spl.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2013 - 2014 Xilinx, Inc
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_MICROBLAZE_SPL_H_
+#define _ASM_MICROBLAZE_SPL_H_
+
+#define BOOT_DEVICE_RAM 1
+#define BOOT_DEVICE_NOR 2
+#define BOOT_DEVICE_SPI 3
+
+#endif
diff --git a/arch/microblaze/include/asm/u-boot.h b/arch/microblaze/include/asm/u-boot.h
index 31b014c77d..ab3f23202d 100644
--- a/arch/microblaze/include/asm/u-boot.h
+++ b/arch/microblaze/include/asm/u-boot.h
@@ -25,6 +25,7 @@ typedef struct bd_info {
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
unsigned int bi_baudrate; /* Console Baudrate */
+ ulong bi_boot_params; /* where this board expects params */
} bd_t;
/* For image.h:image_check_target_arch() */
diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c
index 896e73a762..fafeeaebd6 100644
--- a/arch/microblaze/lib/board.c
+++ b/arch/microblaze/lib/board.c
@@ -24,6 +24,12 @@
DECLARE_GLOBAL_DATA_PTR;
+static int display_banner(void)
+{
+ printf("\n\n%s\n\n", version_string);
+ return 0;
+}
+
/*
* All attempts to come up with a "common" initialization sequence
* that works for all boards and architectures failed: some of the
@@ -44,9 +50,14 @@ init_fnc_t *init_sequence[] = {
fdtdec_check_fdt,
#endif
serial_init,
+#ifndef CONFIG_SPL_BUILD
console_init_f,
+#endif
+ display_banner,
+#ifndef CONFIG_SPL_BUILD
interrupts_init,
timer_init,
+#endif
NULL,
};
@@ -59,7 +70,7 @@ void board_init_f(ulong not_used)
gd = (gd_t *)(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET);
bd = (bd_t *)(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET
- GENERATED_BD_INFO_SIZE);
-#if defined(CONFIG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH) && !defined(CONFIG_SPL_BUILD)
ulong flash_size = 0;
#endif
asm ("nop"); /* FIXME gd is not initialize - wait */
@@ -76,14 +87,17 @@ void board_init_f(ulong not_used)
#ifdef CONFIG_OF_EMBED
/* Get a pointer to the FDT */
- gd->fdt_blob = _binary_dt_dtb_start;
+ gd->fdt_blob = __dtb_dt_begin;
#elif defined CONFIG_OF_SEPARATE
/* FDT is at end of image */
gd->fdt_blob = (void *)__end;
#endif
+
+#ifndef CONFIG_SPL_BUILD
/* Allow the early environment to override the fdt address */
gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
(uintptr_t)gd->fdt_blob);
+#endif
/*
* The Malloc area is immediately below the monitor copy in DRAM
@@ -103,6 +117,7 @@ void board_init_f(ulong not_used)
hang();
}
+#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_OF_CONTROL
/* For now, put this check after the console is ready */
if (fdtdec_prepare_fdt())
@@ -183,4 +198,5 @@ void board_init_f(ulong not_used)
WATCHDOG_RESET();
main_loop();
}
+#endif /* CONFIG_SPL_BUILD */
}
diff --git a/arch/microblaze/lib/time.c b/arch/microblaze/lib/time.c
deleted file mode 100644
index e69de29bb2..0000000000
--- a/arch/microblaze/lib/time.c
+++ /dev/null
generated by cgit (git 2.34.1) at 2024-12-28 03:52:04 +0000