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-rw-r--r--arch/mips/dts/Makefile3
-rw-r--r--arch/mips/dts/brcm,bcm63268.dtsi143
-rw-r--r--arch/mips/dts/brcm,bcm6328.dtsi127
-rw-r--r--arch/mips/dts/brcm,bcm6358.dtsi140
-rw-r--r--arch/mips/dts/comtrend,ar-5387un.dts57
-rw-r--r--arch/mips/dts/comtrend,vr-3032u.dts70
-rw-r--r--arch/mips/dts/huawei,hg556a.dts104
-rw-r--r--arch/mips/dts/sfr,nb4-ser.dts93
8 files changed, 737 insertions, 0 deletions
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 30fcc2b91e..4c02c48c11 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -8,6 +8,9 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
+dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
+dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
targets += $(dtb-y)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi
new file mode 100644
index 0000000000..b03763f093
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm63268.dtsi
@@ -0,0 +1,143 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm63268-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm63268-power-domain.h>
+#include <dt-bindings/reset/bcm63268-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm63268";
+
+ cpus {
+ reg = <0x10000000 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu@0 {
+ compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x10000004 0x4>;
+ #clock-cells = <1>;
+ };
+
+ timer_clk: timer-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x100000ac 0x4>;
+ #clock-cells = <1>;
+ };
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ pll_cntl: syscon@10000008 {
+ compatible = "syscon";
+ reg = <0x10000008 0x4>;
+ };
+
+ syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pll_cntl>;
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
+ gpio1: gpio-controller@100000c0 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x100000c0 0x4>, <0x100000c8 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <20>;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@100000c4 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x100000c4 0x4>, <0x100000cc 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ uart0: serial@10000180 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000180 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@100001a0 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x100001a0 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ periph_pwr: power-controller@1000184c {
+ compatible = "brcm,bcm6328-power-domain";
+ reg = <0x1000184c 0x4>;
+ #power-domain-cells = <1>;
+ };
+
+ leds: led-controller@10001900 {
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10001900 0x24>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ memory-controller@10003000 {
+ compatible = "brcm,bcm6328-mc";
+ reg = <0x10003000 0x894>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi
new file mode 100644
index 0000000000..3926885899
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6328.dtsi
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6328-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm6328-power-domain.h>
+#include <dt-bindings/reset/bcm6328-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6328";
+
+ cpus {
+ reg = <0x10000000 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu@0 {
+ compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x10000004 0x4>;
+ #clock-cells = <1>;
+ };
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
+ pll_cntl: syscon@10000068 {
+ compatible = "syscon";
+ reg = <0x10000068 0x4>;
+ };
+
+ syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pll_cntl>;
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+
+ gpio: gpio-controller@10000084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ uart0: serial@10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller@10000800 {
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10000800 0x24>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ periph_pwr: power-controller@10001848 {
+ compatible = "brcm,bcm6328-power-domain";
+ reg = <0x10001848 0x4>;
+ #power-domain-cells = <1>;
+ };
+
+ memory-controller@10003000 {
+ compatible = "brcm,bcm6328-mc";
+ reg = <0x10003000 0x864>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
diff --git a/arch/mips/dts/brcm,bcm6358.dtsi b/arch/mips/dts/brcm,bcm6358.dtsi
new file mode 100644
index 0000000000..0dad998501
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6358.dtsi
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6358-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/bcm6358-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6358";
+
+ cpus {
+ reg = <0xfffe0000 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu@0 {
+ compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0xfffe0004 0x4>;
+ #clock-cells = <1>;
+ };
+ };
+
+ pflash: nor@1e000000 {
+ compatible = "cfi-flash";
+ reg = <0x1e000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ pll_cntl: syscon@fffe0008 {
+ compatible = "syscon";
+ reg = <0xfffe0008 0x4>;
+ };
+
+ syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pll_cntl>;
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+
+ periph_rst: reset-controller@fffe0034 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0xfffe0034 0x4>;
+ #reset-cells = <1>;
+ };
+
+ gpio1: gpio-controller@fffe0080 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@fffe0084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xfffe0084 0x4>, <0xfffe008c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller@fffe00d0 {
+ compatible = "brcm,bcm6358-leds";
+ reg = <0xfffe00d0 0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ uart0: serial@fffe0100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0100 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@fffe0120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0120 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ memory-controller@fffe1200 {
+ compatible = "brcm,bcm6358-mc";
+ reg = <0xfffe1200 0x4c>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
diff --git a/arch/mips/dts/comtrend,ar-5387un.dts b/arch/mips/dts/comtrend,ar-5387un.dts
new file mode 100644
index 0000000000..73f2b49b76
--- /dev/null
+++ b/arch/mips/dts/comtrend,ar-5387un.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6328.dtsi"
+
+/ {
+ model = "Comtrend AR-5387un";
+ compatible = "comtrend,ar5387-un", "brcm,bcm6328";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&leds {
+ status = "okay";
+
+ led@1 {
+ reg = <1>;
+ label = "AR-5387un:red:inet";
+ };
+
+ led@4 {
+ reg = <4>;
+ label = "AR-5387un:red:power";
+ };
+
+ led@7 {
+ reg = <7>;
+ label = "AR-5387un:green:inet";
+ };
+
+ led@8 {
+ reg = <8>;
+ label = "AR-5387un:green:power";
+ };
+
+ led@11 {
+ reg = <11>;
+ active-low;
+ label = "AR-5387un:green:dsl";
+ };
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts
new file mode 100644
index 0000000000..54e738c821
--- /dev/null
+++ b/arch/mips/dts/comtrend,vr-3032u.dts
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm63268.dtsi"
+
+/ {
+ model = "Comtrend VR-3032u";
+ compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&leds {
+ status = "okay";
+ brcm,serial-leds;
+ brcm,serial-dat-low;
+ brcm,serial-shift-inv;
+
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "VR-3032u:red:inet";
+ };
+
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "VR-3032u:green:dsl";
+ };
+
+ led@4 {
+ reg = <4>;
+ active-low;
+ label = "VR-3032u:green:usb";
+ };
+
+ led@7 {
+ reg = <7>;
+ active-low;
+ label = "VR-3032u:green:wps";
+ };
+
+ led@8 {
+ reg = <8>;
+ active-low;
+ label = "VR-3032u:green:inet";
+ };
+
+ led@20 {
+ reg = <20>;
+ active-low;
+ label = "VR-3032u:green:power";
+ };
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/arch/mips/dts/huawei,hg556a.dts b/arch/mips/dts/huawei,hg556a.dts
new file mode 100644
index 0000000000..31c7d7ed5c
--- /dev/null
+++ b/arch/mips/dts/huawei,hg556a.dts
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6358.dtsi"
+
+/ {
+ model = "Huawei EchoLife HG556a";
+ compatible = "huawei,hg556a", "brcm,bcm6358";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ message_red {
+ label = "HG556a:red:message";
+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ hspa_red {
+ label = "HG556a:red:hspa";
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ };
+
+ dsl_red {
+ label = "HG556a:red:dsl";
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ power_red {
+ label = "HG556a:red:power";
+ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ all_red {
+ label = "HG556a:red:all";
+ gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+ };
+
+ lan1_green {
+ label = "HG556a:green:lan1";
+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ };
+
+ lan1_red {
+ label = "HG556a:red:lan1";
+ gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+ };
+
+ lan2_green {
+ label = "HG556a:green:lan2";
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ lan2_red {
+ label = "HG556a:red:lan2";
+ gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+ };
+
+ lan3_green {
+ label = "HG556a:green:lan3";
+ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+ };
+
+ lan3_red {
+ label = "HG556a:red:lan3";
+ gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+ };
+
+ lan4_green {
+ label = "HG556a:green:lan4";
+ gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+ };
+
+ lan4_red {
+ label = "HG556a:red:lan4";
+ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&pflash {
+ status = "okay";
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/arch/mips/dts/sfr,nb4-ser.dts b/arch/mips/dts/sfr,nb4-ser.dts
new file mode 100644
index 0000000000..f2092e9f99
--- /dev/null
+++ b/arch/mips/dts/sfr,nb4-ser.dts
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6358.dtsi"
+
+/ {
+ model = "SFR NeufBox 4 (Sercomm) Board";
+ compatible = "sfr,nb4-ser", "brcm,bcm6358";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ traffic_white {
+ label = "NB4-SER:white:traffic";
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ service_blue {
+ label = "NB4-SER:blue:service";
+ gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi_white {
+ label = "NB4-SER:white:wifi";
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ service_red {
+ label = "NB4-SER:red:service";
+ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+ };
+
+ service_green {
+ label = "NB4-SER:green:service";
+ gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&leds {
+ status = "okay";
+ brcm,clk-div = <1>;
+
+ led@0 {
+ reg = <0>;
+ active-low;
+ label = "NB4-SER:white:alarm";
+ };
+
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "NB4-SER:white:tv";
+ };
+
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "NB4-SER:white:tel";
+ };
+
+ led@4 {
+ reg = <4>;
+ active-low;
+ label = "NB4-SER:white:adsl";
+ };
+};
+
+&pflash {
+ status = "okay";
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};