diff options
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/cacheops.h | 13 | ||||
-rw-r--r-- | arch/mips/include/asm/malta.h | 5 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h index 6464250d84..75ec380980 100644 --- a/arch/mips/include/asm/cacheops.h +++ b/arch/mips/include/asm/cacheops.h @@ -11,6 +11,19 @@ #ifndef __ASM_CACHEOPS_H #define __ASM_CACHEOPS_H +#ifndef __ASSEMBLY__ + +static inline void mips_cache(int op, const volatile void *addr) +{ +#ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE + __builtin_mips_cache(op, addr); +#else + __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr)) +#endif +} + +#endif /* !__ASSEMBLY__ */ + /* * Cache Operations available on all MIPS processors with R4000-style caches */ diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h index 9e7c045aac..d9ffc1558d 100644 --- a/arch/mips/include/asm/malta.h +++ b/arch/mips/include/asm/malta.h @@ -64,4 +64,9 @@ #define PCI_CFG_PIIX4_GENCFG_SERIRQ (1 << 16) +#define PCI_CFG_PIIX4_IDETIM_PRI 0x40 +#define PCI_CFG_PIIX4_IDETIM_SEC 0x42 + +#define PCI_CFG_PIIX4_IDETIM_IDE (1 << 15) + #endif /* _MIPS_ASM_MALTA_H */ |