diff options
Diffstat (limited to 'arch/mips/mach-mscc/cpu.c')
| -rw-r--r-- | arch/mips/mach-mscc/cpu.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c index b503e1407b..5be8ff69d5 100644 --- a/arch/mips/mach-mscc/cpu.c +++ b/arch/mips/mach-mscc/cpu.c @@ -48,6 +48,10 @@ void vcoreiii_tlb_init(void) */ create_tlb(tlbix++, MSCC_IO_ORIGIN1_OFFSET, SZ_16M, MMU_REGIO_RW, MMU_REGIO_RW); +#ifdef CONFIG_SOC_LUTON + create_tlb(tlbix++, MSCC_IO_ORIGIN2_OFFSET, SZ_16M, MMU_REGIO_RW, + MMU_REGIO_RW); +#endif #if CONFIG_SYS_TEXT_BASE == MSCC_FLASH_TO /* @@ -75,6 +79,14 @@ void vcoreiii_tlb_init(void) int mach_cpu_init(void) { /* Speed up NOR flash access */ +#ifdef CONFIG_SOC_LUTON + writel(ICPU_PI_MST_CFG_TRISTATE_CTRL + + ICPU_PI_MST_CFG_CLK_DIV(4), BASE_CFG + ICPU_PI_MST_CFG); + + writel(ICPU_SPI_MST_CFG_FAST_READ_ENA + + ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) + + ICPU_SPI_MST_CFG_CLK_DIV(9), BASE_CFG + ICPU_SPI_MST_CFG); +#else writel(ICPU_SPI_MST_CFG_CS_DESELECT_TIME(0x19) + ICPU_SPI_MST_CFG_CLK_DIV(9), BASE_CFG + ICPU_SPI_MST_CFG); /* @@ -85,6 +97,6 @@ int mach_cpu_init(void) writel(0, BASE_CFG + ICPU_DST_INTR_MAP(1)); writel(0, BASE_CFG + ICPU_DST_INTR_MAP(2)); writel(0, BASE_CFG + ICPU_DST_INTR_MAP(3)); - +#endif return 0; } |