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-rw-r--r--arch/mips/dts/Makefile1
-rw-r--r--arch/mips/dts/brcm,bcm6318.dtsi30
-rw-r--r--arch/mips/dts/brcm,bcm63268.dtsi30
-rw-r--r--arch/mips/dts/brcm,bcm6328.dtsi30
-rw-r--r--arch/mips/dts/brcm,bcm6348.dtsi20
-rw-r--r--arch/mips/dts/brcm,bcm6358.dtsi27
-rw-r--r--arch/mips/dts/brcm,bcm6362.dtsi216
-rw-r--r--arch/mips/dts/brcm,bcm6368.dtsi29
-rw-r--r--arch/mips/dts/comtrend,ar-5315u.dts12
-rw-r--r--arch/mips/dts/comtrend,ar-5387un.dts12
-rw-r--r--arch/mips/dts/comtrend,ct-5361.dts8
-rw-r--r--arch/mips/dts/comtrend,vr-3032u.dts12
-rw-r--r--arch/mips/dts/comtrend,wap-5813n.dts12
-rw-r--r--arch/mips/dts/huawei,hg556a.dts12
-rw-r--r--arch/mips/dts/netgear,dgnd3700v2.dts133
-rw-r--r--arch/mips/dts/sfr,nb4-ser.dts12
-rw-r--r--arch/mips/mach-bmips/Kconfig24
17 files changed, 620 insertions, 0 deletions
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 840dbf170d..e80905cf3a 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -15,6 +15,7 @@ dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
+dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi
index 54964a7009..015acc9173 100644
--- a/arch/mips/dts/brcm,bcm6318.dtsi
+++ b/arch/mips/dts/brcm,bcm6318.dtsi
@@ -153,5 +153,35 @@
reg = <0x10004000 0x38>;
u-boot,dm-pre-reloc;
};
+
+ ehci: usb-controller@10005000 {
+ compatible = "brcm,bcm6318-ehci", "generic-ehci";
+ reg = <0x10005000 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ ohci: usb-controller@10005100 {
+ compatible = "brcm,bcm6318-ohci", "generic-ohci";
+ reg = <0x10005100 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10005200 {
+ compatible = "brcm,bcm6318-usbh";
+ reg = <0x10005200 0x30>;
+ #phy-cells = <0>;
+ clocks = <&periph_clk BCM6318_CLK_USB>;
+ clock-names = "usbh";
+ power-domains = <&periph_pwr BCM6318_PWR_USB>;
+ resets = <&periph_rst BCM6318_RST_USBH>;
+
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi
index 4d4e36cccc..ade0b49e68 100644
--- a/arch/mips/dts/brcm,bcm63268.dtsi
+++ b/arch/mips/dts/brcm,bcm63268.dtsi
@@ -183,6 +183,36 @@
status = "disabled";
};
+ ehci: usb-controller@10002500 {
+ compatible = "brcm,bcm63268-ehci", "generic-ehci";
+ reg = <0x10002500 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ ohci: usb-controller@10002600 {
+ compatible = "brcm,bcm63268-ohci", "generic-ohci";
+ reg = <0x10002600 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10002700 {
+ compatible = "brcm,bcm63268-usbh";
+ reg = <0x10002700 0x38>;
+ #phy-cells = <0>;
+ clocks = <&periph_clk BCM63268_CLK_USBH>, <&timer_clk BCM63268_TCLK_USB_REF>;
+ clock-names = "usbh", "usb_ref";
+ power-domains = <&periph_pwr BCM63268_PWR_USBH>;
+ resets = <&periph_rst BCM63268_RST_USBH>;
+
+ status = "disabled";
+ };
+
memory-controller@10003000 {
compatible = "brcm,bcm6328-mc";
reg = <0x10003000 0x894>;
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi
index 67d9278be4..4fbbcec153 100644
--- a/arch/mips/dts/brcm,bcm6328.dtsi
+++ b/arch/mips/dts/brcm,bcm6328.dtsi
@@ -153,6 +153,36 @@
#power-domain-cells = <1>;
};
+ ehci: usb-controller@10002500 {
+ compatible = "brcm,bcm6328-ehci", "generic-ehci";
+ reg = <0x10002500 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ ohci: usb-controller@10002600 {
+ compatible = "brcm,bcm6328-ohci", "generic-ohci";
+ reg = <0x10002600 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10002700 {
+ compatible = "brcm,bcm6328-usbh";
+ reg = <0x10002700 0x38>;
+ #phy-cells = <0>;
+ clocks = <&periph_clk BCM6328_CLK_USBH>;
+ clock-names = "usbh";
+ power-domains = <&periph_pwr BCM6328_PWR_USBH>;
+ resets = <&periph_rst BCM6328_RST_USBH>;
+
+ status = "disabled";
+ };
+
memory-controller@10003000 {
compatible = "brcm,bcm6328-mc";
reg = <0x10003000 0x864>;
diff --git a/arch/mips/dts/brcm,bcm6348.dtsi b/arch/mips/dts/brcm,bcm6348.dtsi
index 540b9fea5b..92fb91afc1 100644
--- a/arch/mips/dts/brcm,bcm6348.dtsi
+++ b/arch/mips/dts/brcm,bcm6348.dtsi
@@ -135,6 +135,26 @@
status = "disabled";
};
+ ohci: usb-controller@fffe1b00 {
+ compatible = "brcm,bcm6348-ohci", "generic-ohci";
+ reg = <0xfffe1b00 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@fffe1c00 {
+ compatible = "brcm,bcm6348-usbh";
+ reg = <0xfffe1c00 0x4>;
+ #phy-cells = <0>;
+ clocks = <&periph_clk BCM6348_CLK_USBH>;
+ clock-names = "usbh";
+ resets = <&periph_rst BCM6348_RST_USBH>;
+
+ status = "disabled";
+ };
+
memory-controller@fffe2300 {
compatible = "brcm,bcm6338-mc";
reg = <0xfffe2300 0x38>;
diff --git a/arch/mips/dts/brcm,bcm6358.dtsi b/arch/mips/dts/brcm,bcm6358.dtsi
index 1662783279..b63b53baee 100644
--- a/arch/mips/dts/brcm,bcm6358.dtsi
+++ b/arch/mips/dts/brcm,bcm6358.dtsi
@@ -164,5 +164,32 @@
reg = <0xfffe1200 0x4c>;
u-boot,dm-pre-reloc;
};
+
+ ehci: usb-controller@fffe1300 {
+ compatible = "brcm,bcm6358-ehci", "generic-ehci";
+ reg = <0xfffe1300 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ ohci: usb-controller@fffe1400 {
+ compatible = "brcm,bcm6358-ohci", "generic-ohci";
+ reg = <0xfffe1400 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@fffe1500 {
+ compatible = "brcm,bcm6358-usbh";
+ reg = <0xfffe1500 0x28>;
+ #phy-cells = <0>;
+ resets = <&periph_rst BCM6358_RST_USBH>;
+
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi
new file mode 100644
index 0000000000..f695ec3253
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6362.dtsi
@@ -0,0 +1,216 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6362-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm6362-power-domain.h>
+#include <dt-bindings/reset/bcm6362-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6362";
+
+ aliases {
+ spi0 = &lsspi;
+ spi1 = &hsspi;
+ };
+
+ cpus {
+ reg = <0x10000000 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu@0 {
+ compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <133333333>;
+ };
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x10000004 0x4>;
+ #clock-cells = <1>;
+ };
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ pll_cntl: syscon@10000008 {
+ compatible = "syscon";
+ reg = <0x10000008 0x4>;
+ };
+
+ syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pll_cntl>;
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
+ wdt: watchdog@1000005c {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x1000005c 0xc>;
+ clocks = <&periph_osc>;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdt>;
+ };
+
+ gpio1: gpio-controller@10000080 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000080 0x4>, <0x10000088 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <16>;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@10000084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ uart0: serial@10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ lsspi: spi@10000800 {
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&periph_clk BCM6362_CLK_SPI>;
+ resets = <&periph_rst BCM6362_RST_SPI>;
+ spi-max-frequency = <20000000>;
+ num-cs = <8>;
+
+ status = "disabled";
+ };
+
+ hsspi: spi@10001000 {
+ compatible = "brcm,bcm6328-hsspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10001000 0x600>;
+ clocks = <&periph_clk BCM6362_CLK_HSSPI>, <&hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ resets = <&periph_rst BCM6362_RST_SPI>;
+ spi-max-frequency = <50000000>;
+ num-cs = <8>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller@10001900 {
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10001900 0x24>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ periph_pwr: power-controller@10001848 {
+ compatible = "brcm,bcm6328-power-domain";
+ reg = <0x10001848 0x4>;
+ #power-domain-cells = <1>;
+ };
+
+ ehci: usb-controller@10002500 {
+ compatible = "brcm,bcm6362-ehci", "generic-ehci";
+ reg = <0x10002500 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ ohci: usb-controller@10002600 {
+ compatible = "brcm,bcm6362-ohci", "generic-ohci";
+ reg = <0x10002600 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10002700 {
+ compatible = "brcm,bcm6368-usbh";
+ reg = <0x10002700 0x38>;
+ #phy-cells = <0>;
+ clocks = <&periph_clk BCM6362_CLK_USBH>;
+ clock-names = "usbh";
+ power-domains = <&periph_pwr BCM6362_PWR_USBH>;
+ resets = <&periph_rst BCM6362_RST_USBH>;
+
+ status = "disabled";
+ };
+
+ memory-controller@10003000 {
+ compatible = "brcm,bcm6328-mc";
+ reg = <0x10003000 0x864>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi
index 1bb538a1f3..fc1c5a244f 100644
--- a/arch/mips/dts/brcm,bcm6368.dtsi
+++ b/arch/mips/dts/brcm,bcm6368.dtsi
@@ -164,5 +164,34 @@
reg = <0x10001200 0x4c>;
u-boot,dm-pre-reloc;
};
+
+ ehci: usb-controller@10001500 {
+ compatible = "brcm,bcm6368-ehci", "generic-ehci";
+ reg = <0x10001500 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ ohci: usb-controller@10001600 {
+ compatible = "brcm,bcm6368-ohci", "generic-ohci";
+ reg = <0x10001600 0x100>;
+ phys = <&usbh>;
+ big-endian;
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10001700 {
+ compatible = "brcm,bcm6368-usbh";
+ reg = <0x10001700 0x38>;
+ #phy-cells = <0>;
+ clocks = <&periph_clk BCM6368_CLK_USBH>;
+ clock-names = "usbh";
+ resets = <&periph_rst BCM6368_RST_USBH>;
+
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/dts/comtrend,ar-5315u.dts b/arch/mips/dts/comtrend,ar-5315u.dts
index 4e4d69b638..af3159a03a 100644
--- a/arch/mips/dts/comtrend,ar-5315u.dts
+++ b/arch/mips/dts/comtrend,ar-5315u.dts
@@ -21,6 +21,10 @@
};
};
+&ehci {
+ status = "okay";
+};
+
&leds {
status = "okay";
@@ -67,6 +71,10 @@
};
};
+&ohci {
+ status = "okay";
+};
+
&spi {
status = "okay";
@@ -83,3 +91,7 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/comtrend,ar-5387un.dts b/arch/mips/dts/comtrend,ar-5387un.dts
index 6067881a78..3a97315b3f 100644
--- a/arch/mips/dts/comtrend,ar-5387un.dts
+++ b/arch/mips/dts/comtrend,ar-5387un.dts
@@ -21,6 +21,10 @@
};
};
+&ehci {
+ status = "okay";
+};
+
&leds {
status = "okay";
@@ -51,6 +55,10 @@
};
};
+&ohci {
+ status = "okay";
+};
+
&spi {
status = "okay";
@@ -67,3 +75,7 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/comtrend,ct-5361.dts b/arch/mips/dts/comtrend,ct-5361.dts
index c909a528a9..74dc09046c 100644
--- a/arch/mips/dts/comtrend,ct-5361.dts
+++ b/arch/mips/dts/comtrend,ct-5361.dts
@@ -39,6 +39,10 @@
status = "okay";
};
+&ohci {
+ status = "okay";
+};
+
&pflash {
status = "okay";
};
@@ -47,3 +51,7 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts
index 54e738c821..9bbecbcdff 100644
--- a/arch/mips/dts/comtrend,vr-3032u.dts
+++ b/arch/mips/dts/comtrend,vr-3032u.dts
@@ -21,6 +21,10 @@
};
};
+&ehci {
+ status = "okay";
+};
+
&leds {
status = "okay";
brcm,serial-leds;
@@ -64,7 +68,15 @@
};
};
+&ohci {
+ status = "okay";
+};
+
&uart0 {
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/comtrend,wap-5813n.dts b/arch/mips/dts/comtrend,wap-5813n.dts
index 29386e2662..f1f5430b42 100644
--- a/arch/mips/dts/comtrend,wap-5813n.dts
+++ b/arch/mips/dts/comtrend,wap-5813n.dts
@@ -51,10 +51,18 @@
};
};
+&ehci {
+ status = "okay";
+};
+
&gpio0 {
status = "okay";
};
+&ohci {
+ status = "okay";
+};
+
&pflash {
status = "okay";
};
@@ -63,3 +71,7 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/huawei,hg556a.dts b/arch/mips/dts/huawei,hg556a.dts
index 31c7d7ed5c..a1e9c15ab9 100644
--- a/arch/mips/dts/huawei,hg556a.dts
+++ b/arch/mips/dts/huawei,hg556a.dts
@@ -90,10 +90,18 @@
};
};
+&ehci {
+ status = "okay";
+};
+
&gpio0 {
status = "okay";
};
+&ohci {
+ status = "okay";
+};
+
&pflash {
status = "okay";
};
@@ -102,3 +110,7 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/netgear,dgnd3700v2.dts b/arch/mips/dts/netgear,dgnd3700v2.dts
new file mode 100644
index 0000000000..8dc7d7ec32
--- /dev/null
+++ b/arch/mips/dts/netgear,dgnd3700v2.dts
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6362.dtsi"
+
+/ {
+ model = "Netgear DGND3700v2";
+ compatible = "netgear,dgnd3700v2", "brcm,bcm6362";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "DGND3700v2:green:inet";
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ };
+
+ dsl_green {
+ label = "DGND3700v2:green:dsl";
+ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+ };
+
+ power_amber {
+ label = "DGND3700v2:red:power";
+ gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&ehci {
+ status = "okay";
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&leds {
+ status = "okay";
+ brcm,serial-leds;
+ brcm,serial-dat-low;
+ brcm,serial-shift-inv;
+ brcm,serial-mux;
+
+ led@8 {
+ reg = <8>;
+ label = "DGND3700v2:green:power";
+ };
+
+ led@9 {
+ reg = <9>;
+ active-low;
+ label = "DGND3700v2:green:wps";
+ };
+
+ led@10 {
+ reg = <10>;
+ active-low;
+ label = "DGND3700v2:green:usb1";
+ };
+
+ led@11 {
+ reg = <11>;
+ active-low;
+ label = "DGND3700v2:green:usb2";
+ };
+
+ led@12 {
+ reg = <12>;
+ active-low;
+ label = "DGND3700v2:amber:inet";
+ };
+
+ led@13 {
+ reg = <13>;
+ active-low;
+ label = "DGND3700v2:green:ethernet";
+ };
+
+ led@14 {
+ reg = <14>;
+ active-low;
+ label = "DGND3700v2:amber:dsl";
+ };
+
+ led@16 {
+ reg = <16>;
+ active-low;
+ label = "DGND3700v2:amber:usb1";
+ };
+
+ led@17 {
+ reg = <17>;
+ active-low;
+ label = "DGND3700v2:amber:usb2";
+ };
+
+ led@18 {
+ reg = <18>;
+ active-low;
+ label = "DGND3700v2:amber:ethernet";
+ };
+};
+
+&ohci {
+ status = "okay";
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/dts/sfr,nb4-ser.dts b/arch/mips/dts/sfr,nb4-ser.dts
index f2092e9f99..473372faa1 100644
--- a/arch/mips/dts/sfr,nb4-ser.dts
+++ b/arch/mips/dts/sfr,nb4-ser.dts
@@ -50,6 +50,10 @@
};
};
+&ehci {
+ status = "okay";
+};
+
&gpio0 {
status = "okay";
};
@@ -83,6 +87,10 @@
};
};
+&ohci {
+ status = "okay";
+};
+
&pflash {
status = "okay";
};
@@ -91,3 +99,7 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&usbh {
+ status = "okay";
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index e4a0118368..10900bf604 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -12,6 +12,7 @@ config SYS_SOC
default "bcm6348" if SOC_BMIPS_BCM6348
default "bcm6358" if SOC_BMIPS_BCM6358
default "bcm6368" if SOC_BMIPS_BCM6368
+ default "bcm6362" if SOC_BMIPS_BCM6362
default "bcm63268" if SOC_BMIPS_BCM63268
choice
@@ -94,6 +95,17 @@ config SOC_BMIPS_BCM6368
help
This supports BMIPS BCM6368 family including BCM6368 and BCM6369.
+config SOC_BMIPS_BCM6362
+ bool "BMIPS BCM6362 family"
+ select SUPPORTS_BIG_ENDIAN
+ select SUPPORTS_CPU_MIPS32_R1
+ select MIPS_TUNE_4KC
+ select MIPS_L1_CACHE_SHIFT_4
+ select SWAP_IO_SPACE
+ select SYSRESET_SYSCON
+ help
+ This supports BMIPS BCM6362 family including BCM6361 and BCM6362.
+
config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
select SUPPORTS_BIG_ENDIAN
@@ -188,6 +200,17 @@ config BOARD_NETGEAR_CG3100D
ethernet ports, 1 UART, GPIO buttons and LEDs, and a BCM43225
(miniPCIe).
+config BOARD_NETGEAR_DGND3700V2
+ bool "Netgear DGND3700v2"
+ depends on SOC_BMIPS_BCM6362
+ select BMIPS_SUPPORTS_BOOT_RAM
+ help
+ Netgear DGND3700v2 boards have a BCM6362 SoC with 64 MB of RAM and
+ 32 MB of flash (NAND).
+ Between its different peripherals there's a BCM53125 switch with 5
+ ethernet ports, 2 USB ports, 1 UART, GPIO buttons and LEDs, and a
+ BCM43228 (miniPCIe).
+
config BOARD_SAGEM_FAST1704
bool "Sagem F@ST1704"
depends on SOC_BMIPS_BCM6338
@@ -235,6 +258,7 @@ source "board/comtrend/vr3032u/Kconfig"
source "board/comtrend/wap5813n/Kconfig"
source "board/huawei/hg556a/Kconfig"
source "board/netgear/cg3100d/Kconfig"
+source "board/netgear/dgnd3700v2/Kconfig"
source "board/sagem/f@st1704/Kconfig"
source "board/sfr/nb4_ser/Kconfig"
generated by cgit (git 2.34.1) at 2025-01-11 11:30:45 +0000