diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc8260')
-rw-r--r-- | arch/powerpc/cpu/mpc8260/Kconfig | 60 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8260/cpu_init.c | 4 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8260/pci.c | 64 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8260/start.S | 61 |
4 files changed, 0 insertions, 189 deletions
diff --git a/arch/powerpc/cpu/mpc8260/Kconfig b/arch/powerpc/cpu/mpc8260/Kconfig index 2541400e72..55941c830b 100644 --- a/arch/powerpc/cpu/mpc8260/Kconfig +++ b/arch/powerpc/cpu/mpc8260/Kconfig @@ -7,71 +7,11 @@ config SYS_CPU choice prompt "Target select" -config TARGET_ATC - bool "Support atc" - -config TARGET_COGENT_MPC8260 - bool "Support cogent_mpc8260" - -config TARGET_CPU86 - bool "Support CPU86" - -config TARGET_CPU87 - bool "Support CPU87" - -config TARGET_EP8260 - bool "Support ep8260" - -config TARGET_EP82XXM - bool "Support ep82xxm" - -config TARGET_GW8260 - bool "Support gw8260" - -config TARGET_IPHASE4539 - bool "Support IPHASE4539" - -config TARGET_MUAS3001 - bool "Support muas3001" - -config TARGET_PM826 - bool "Support PM826" - -config TARGET_PM828 - bool "Support PM828" - -config TARGET_PPMC8260 - bool "Support ppmc8260" - -config TARGET_SACSNG - bool "Support sacsng" - -config TARGET_MPC8266ADS - bool "Support MPC8266ADS" - -config TARGET_VOVPN_GW - bool "Support VoVPN-GW" - config TARGET_KM82XX bool "Support km82xx" endchoice -source "board/atc/Kconfig" -source "board/cogent/Kconfig" -source "board/cpu86/Kconfig" -source "board/cpu87/Kconfig" -source "board/ep8260/Kconfig" -source "board/ep82xxm/Kconfig" -source "board/freescale/mpc8266ads/Kconfig" -source "board/funkwerk/vovpn-gw/Kconfig" -source "board/gw8260/Kconfig" -source "board/iphase4539/Kconfig" source "board/keymile/km82xx/Kconfig" -source "board/muas3001/Kconfig" -source "board/pm826/Kconfig" -source "board/pm828/Kconfig" -source "board/ppmc8260/Kconfig" -source "board/sacsng/Kconfig" endmenu diff --git a/arch/powerpc/cpu/mpc8260/cpu_init.c b/arch/powerpc/cpu/mpc8260/cpu_init.c index f46a9c0a70..a9bb5adeb2 100644 --- a/arch/powerpc/cpu/mpc8260/cpu_init.c +++ b/arch/powerpc/cpu/mpc8260/cpu_init.c @@ -88,9 +88,7 @@ static void config_8260_ioports (volatile immap_t * immr) */ void cpu_init_f (volatile immap_t * immr) { -#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ uint sccr; -#endif #if defined(CONFIG_BOARD_GET_CPU_CLK_F) unsigned long cpu_clk; #endif @@ -141,13 +139,11 @@ void cpu_init_f (volatile immap_t * immr) /* initialize the PIT (4-42) */ immr->im_sit.sit_piscr = CONFIG_SYS_PISCR; -#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ /* System clock control register (9-8) */ sccr = immr->im_clkrst.car_sccr & (SCCR_PCI_MODE | SCCR_PCI_MODCK | SCCR_PCIDF_MSK); immr->im_clkrst.car_sccr = sccr | (CONFIG_SYS_SCCR & ~(SCCR_PCI_MODE | SCCR_PCI_MODCK | SCCR_PCIDF_MSK) ); -#endif /* !CONFIG_COGENT */ /* * Memory Controller: diff --git a/arch/powerpc/cpu/mpc8260/pci.c b/arch/powerpc/cpu/mpc8260/pci.c index f7bb05d204..56f290ca92 100644 --- a/arch/powerpc/cpu/mpc8260/pci.c +++ b/arch/powerpc/cpu/mpc8260/pci.c @@ -22,10 +22,6 @@ #include <fdt_support.h> #endif -#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 || defined CONFIG_PM826 -DECLARE_GLOBAL_DATA_PTR; -#endif - /* * Local->PCI map (from CPU) controlled by * MPC826x master window @@ -236,34 +232,6 @@ void pci_mpc8250_init (struct pci_controller *hose) CONFIG_SYS_IMMR + PCI_CFG_DATA_REG); /* - * Setting required to enable local bus for PCI (SIUMCR [LBPC]). - */ -#ifdef CONFIG_MPC8266ADS - immap->im_siu_conf.sc_siumcr = - (immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11) - | SIUMCR_LBPC01; -#elif defined CONFIG_MPC8272 - immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr & - ~SIUMCR_BBD & - ~SIUMCR_ESE & - ~SIUMCR_PBSE & - ~SIUMCR_CDIS & - ~SIUMCR_DPPC11 & - ~SIUMCR_L2CPC11 & - ~SIUMCR_LBPC11 & - ~SIUMCR_APPC11 & - ~SIUMCR_CS10PC11 & - ~SIUMCR_BCTLC11 & - ~SIUMCR_MMR11) - | SIUMCR_DPPC11 - | SIUMCR_L2CPC01 - | SIUMCR_LBPC00 - | SIUMCR_APPC10 - | SIUMCR_CS10PC00 - | SIUMCR_BCTLC00 - | SIUMCR_MMR11; -#else - /* * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), * and local bus for PCI (SIUMCR [LBPC]). */ @@ -274,7 +242,6 @@ void pci_mpc8250_init (struct pci_controller *hose) SIUMCR_LBPC01 | SIUMCR_CS10PC01 | SIUMCR_APPC10; -#endif /* Make PCI lowest priority */ /* Each 4 bits is a device bus request and the MS 4bits @@ -304,24 +271,11 @@ void pci_mpc8250_init (struct pci_controller *hose) immap->im_memctl.memc_pcimsk0 = PCIMSK0_MASK; immap->im_memctl.memc_pcibr0 = PCI_MSTR0_LOCAL | PCIBR_ENABLE; -#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 - immap->im_memctl.memc_pcimsk1 = PCIMSK1_MASK; - immap->im_memctl.memc_pcibr1 = PCI_MSTR1_LOCAL | PCIBR_ENABLE; -#endif - /* Release PCI RST (by default the PCI RST signal is held low) */ immap->im_pci.pci_gcr = cpu_to_le32 (PCIGCR_PCI_BUS_EN); /* give it some time */ { -#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 - /* Give the PCI cards more time to initialize before query - This might be good for other boards also - */ - int i; - - for (i = 0; i < 1000; ++i) -#endif udelay (1000); } @@ -358,11 +312,7 @@ void pci_mpc8250_init (struct pci_controller *hose) immap->im_pci.pci_picmr0 = cpu_to_le32 (PICMR0_MASK_ATTRIB); /* Size & attribute */ /* See above for description - puts PCI request as highest priority */ -#ifdef CONFIG_MPC8272 - immap->im_siu_conf.sc_ppc_alrh = 0x01236745; -#else immap->im_siu_conf.sc_ppc_alrh = 0x03124567; -#endif /* Park the bus on the PCI */ immap->im_siu_conf.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI; @@ -388,30 +338,16 @@ void pci_mpc8250_init (struct pci_controller *hose) hose->last_busno = 0xff; /* System memory space */ -#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 || defined CONFIG_PM826 - pci_set_region (hose->regions + 0, - PCI_SLV_MEM_BUS, - PCI_SLV_MEM_LOCAL, - gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); -#else pci_set_region (hose->regions + 0, CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_BASE, 0x4000000, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); -#endif /* PCI memory space */ -#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 - pci_set_region (hose->regions + 1, - PCI_MSTR_MEMIO_BUS, - PCI_MSTR_MEMIO_LOCAL, - PCI_MSTR_MEMIO_SIZE, PCI_REGION_MEM); -#else pci_set_region (hose->regions + 1, PCI_MSTR_MEM_BUS, PCI_MSTR_MEM_LOCAL, PCI_MSTR_MEM_SIZE, PCI_REGION_MEM); -#endif /* PCI I/O space */ pci_set_region (hose->regions + 2, diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index 5f1e174ec8..d255bdeeb8 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -136,14 +136,6 @@ _hrcw_table: _start: mfmsr r5 /* save msr contents */ -#if defined(CONFIG_COGENT) - /* this is what the cogent EPROM does */ - li r0, 0 - mtmsr r0 - isync - bl cogent_init_8260 -#endif /* CONFIG_COGENT */ - #if defined(CONFIG_SYS_DEFAULT_IMMR) lis r3, CONFIG_SYS_IMMR@h ori r3, r3, CONFIG_SYS_IMMR@l @@ -379,57 +371,6 @@ int_return: SYNC rfi -#if defined(CONFIG_COGENT) - -/* - * This code initialises the MPC8260 processor core - * (conforms to PowerPC 603e spec) - */ - - .globl cogent_init_8260 -cogent_init_8260: - - /* Taken from page 14 of CMA282 manual */ - /*--------------------------------------------------------------*/ - - lis r4, (CONFIG_SYS_IMMR+IM_REGBASE)@h - lis r3, CONFIG_SYS_IMMR@h - stw r3, IM_IMMR@l(r4) - lwz r3, IM_IMMR@l(r4) - stw r3, 0(r0) - lis r3, CONFIG_SYS_SYPCR@h - ori r3, r3, CONFIG_SYS_SYPCR@l - stw r3, IM_SYPCR@l(r4) - lwz r3, IM_SYPCR@l(r4) - stw r3, 4(r0) - lis r3, CONFIG_SYS_SCCR@h - ori r3, r3, CONFIG_SYS_SCCR@l - stw r3, IM_SCCR@l(r4) - lwz r3, IM_SCCR@l(r4) - stw r3, 8(r0) - - /* the rest of this was disassembled from the */ - /* EPROM code that came with my CMA282 CPU module */ - /*--------------------------------------------------------------*/ - - lis r1, 0x1234 - ori r1, r1, 0x5678 - stw r1, 0x20(r0) - lwz r1, 0x20(r0) - stw r1, 0x24(r0) - lwz r1, 0x24(r0) - lis r3, 0x0e80 - ori r3, r3, 0 - stw r1, 4(r3) - lwz r1, 4(r3) - - /* Done! */ - /*--------------------------------------------------------------*/ - - blr - -#endif /* CONFIG_COGENT */ - /* * This code initialises the MPC8260 processor core * (conforms to PowerPC 603e spec) @@ -456,11 +397,9 @@ init_8260_core: /*--------------------------------------------------------------*/ lis r3, (CONFIG_SYS_IMMR+IM_REGBASE)@h -#if !defined(CONFIG_COGENT) lis r4, CONFIG_SYS_SYPCR@h ori r4, r4, CONFIG_SYS_SYPCR@l stw r4, IM_SYPCR@l(r3) -#endif /* !CONFIG_COGENT */ #if defined(CONFIG_WATCHDOG) li r4, 21868 /* = 0x556c */ sth r4, IM_SWSR@l(r3) |