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Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
-rw-r--r--arch/powerpc/cpu/mpc85xx/mp.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 42501ca3ce..b0aa72ed6e 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -42,7 +42,7 @@ int hold_cores_in_reset(int verbose)
return 0;
}
-int cpu_reset(int nr)
+int cpu_reset(u32 nr)
{
volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
out_be32(&pic->pir, 1 << nr);
@@ -53,7 +53,7 @@ int cpu_reset(int nr)
return 0;
}
-int cpu_status(int nr)
+int cpu_status(u32 nr)
{
u32 *table, id = get_my_id();
@@ -79,7 +79,7 @@ int cpu_status(int nr)
}
#ifdef CONFIG_FSL_CORENET
-int cpu_disable(int nr)
+int cpu_disable(u32 nr)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -95,7 +95,7 @@ int is_core_disabled(int nr) {
return (coredisrl & (1 << nr));
}
#else
-int cpu_disable(int nr)
+int cpu_disable(u32 nr)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -137,7 +137,7 @@ static u8 boot_entry_map[4] = {
BOOT_ENTRY_R3_LOWER,
};
-int cpu_release(int nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char * const argv[])
{
u32 i, val, *table = (u32 *)&__spin_table + nr * NUM_BOOT_ENTRY;
u64 boot_addr;