diff options
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r-- | arch/powerpc/include/asm/cache.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/ppc405.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/ppc4xx.h | 7 |
3 files changed, 1 insertions, 12 deletions
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index e6b8f69b76..5f9c640aa2 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -8,7 +8,7 @@ #include <asm/processor.h> /* bytes per L1 cache line */ -#if defined(CONFIG_8xx) || defined(CONFIG_IOP480) +#if defined(CONFIG_8xx) #define L1_CACHE_SHIFT 4 #elif defined(CONFIG_PPC64BRIDGE) #define L1_CACHE_SHIFT 7 diff --git a/arch/powerpc/include/asm/ppc405.h b/arch/powerpc/include/asm/ppc405.h index 14a7a379fd..892848aacf 100644 --- a/arch/powerpc/include/asm/ppc405.h +++ b/arch/powerpc/include/asm/ppc405.h @@ -28,11 +28,7 @@ #define PPC_128MB_SACR_BIT(addr) ((addr) >> 27) #define PPC_128MB_SACR_VALUE(addr) PPC_REG_VAL(PPC_128MB_SACR_BIT(addr),1) -#ifndef CONFIG_IOP480 #define CONFIG_SYS_DCACHE_SIZE (16 << 10) /* For AMCC 405 CPUs */ -#else -#define CONFIG_SYS_DCACHE_SIZE (2 << 10) /* For PLX IOP480(403)*/ -#endif /* DCR registers */ #define PLB0_ACR 0x0087 diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h index 633f793c9b..9f2a08b8b3 100644 --- a/arch/powerpc/include/asm/ppc4xx.h +++ b/arch/powerpc/include/asm/ppc4xx.h @@ -84,13 +84,6 @@ #endif /* - * Configure which SDRAM/DDR/DDR2 controller is equipped - */ -#if defined(CONFIG_AP1000) || defined(CONFIG_ML2) -#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */ -#endif - -/* * Common registers for all SoC's */ /* DCR registers */ |