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-rw-r--r--arch/powerpc/cpu/mpc83xx/cpu.c9
-rw-r--r--arch/powerpc/cpu/mpc83xx/cpu_init.c2
-rw-r--r--arch/powerpc/cpu/mpc83xx/serdes.c4
-rw-r--r--arch/powerpc/cpu/mpc83xx/spd_sdram.c4
-rw-r--r--arch/powerpc/cpu/mpc83xx/speed.c4
-rw-r--r--arch/powerpc/include/asm/arch-mpc83xx/soc.h74
-rw-r--r--arch/powerpc/include/asm/config.h2
-rw-r--r--arch/powerpc/include/asm/fsl_mpc83xx_serdes.h4
-rw-r--r--arch/powerpc/include/asm/global_data.h4
-rw-r--r--arch/powerpc/include/asm/io.h18
-rw-r--r--arch/powerpc/include/asm/processor.h2
-rw-r--r--arch/powerpc/lib/Makefile4
-rw-r--r--arch/powerpc/lib/interrupts.c5
13 files changed, 131 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 82370b5430..b29f271e9b 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -25,6 +25,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_CPU_MPC83XX
int checkcpu(void)
{
volatile immap_t *immr;
@@ -114,7 +115,9 @@ int checkcpu(void)
return 0;
}
+#endif
+#ifndef CONFIG_SYSRESET
int
do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
@@ -169,17 +172,17 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
return 1;
}
-
+#endif
/*
* Get timebase clock frequency (like cpu_clk in Hz)
*/
-
+#ifndef CONFIG_TIMER
unsigned long get_tbclk(void)
{
return (gd->bus_clk + 3L) / 4L;
}
-
+#endif
#if defined(CONFIG_WATCHDOG)
void watchdog_reset (void)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index fcac9f63a8..1555205e06 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -464,6 +464,7 @@ static int print_83xx_arb_event(int force)
}
#endif /* CONFIG_DISPLAY_AER_xxxx */
+#ifndef CONFIG_CPU_MPC83XX
/*
* Figure out the cause of the reset
*/
@@ -505,3 +506,4 @@ int prt_83xx_rsr(void)
return 0;
}
+#endif
diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c
index 982a4475f0..8242f95265 100644
--- a/arch/powerpc/cpu/mpc83xx/serdes.c
+++ b/arch/powerpc/cpu/mpc83xx/serdes.c
@@ -8,6 +8,8 @@
* Author: Li Yang <leoli@freescale.com>
*/
+#ifndef CONFIG_MPC83XX_SERDES
+
#include <config.h>
#include <common.h>
#include <asm/io.h>
@@ -148,3 +150,5 @@ void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd)
tmp |= FSL_SRDSRSTCTL_RST;
out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
}
+
+#endif /* !CONFIG_MPC83XX_SERDES */
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index bbc8ef03c7..328a018eb6 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -10,6 +10,8 @@
* Xianghua Xiao (X.Xiao@motorola.com)
*/
+#ifndef CONFIG_MPC83XX_SDRAM
+
#include <common.h>
#include <asm/processor.h>
#include <asm/io.h>
@@ -924,3 +926,5 @@ void ddr_enable_ecc(unsigned int dram_size)
__asm__ __volatile__ ("isync");
}
#endif /* CONFIG_DDR_ECC */
+
+#endif /* !CONFIG_MPC83XX_SDRAM */
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index f0945281cd..39bc1c5340 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -6,6 +6,8 @@
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
*/
+#ifndef CONFIG_CLK_MPC83XX
+
#include <common.h>
#include <mpc83xx.h>
#include <command.h>
@@ -590,3 +592,5 @@ U_BOOT_CMD(clocks, 1, 0, do_clocks,
"print clock configuration",
" clocks"
);
+
+#endif
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/soc.h b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
new file mode 100644
index 0000000000..39bf7d5a7f
--- /dev/null
+++ b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#ifndef _MPC83XX_SOC_H_
+#define _MPC83XX_SOC_H_
+
+enum soc_type {
+ SOC_MPC8308,
+ SOC_MPC8309,
+ SOC_MPC8313,
+ SOC_MPC8315,
+ SOC_MPC832X,
+ SOC_MPC8349,
+ SOC_MPC8360,
+ SOC_MPC8379,
+};
+
+bool mpc83xx_has_sdhc(int type)
+{
+ return (type == SOC_MPC8308) ||
+ (type == SOC_MPC8309) ||
+ (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_tsec(int type)
+{
+ return (type == SOC_MPC8308) ||
+ (type == SOC_MPC8313) ||
+ (type == SOC_MPC8315) ||
+ (type == SOC_MPC8349) ||
+ (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pcie1(int type)
+{
+ return (type == SOC_MPC8308) ||
+ (type == SOC_MPC8315) ||
+ (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pcie2(int type)
+{
+ return (type == SOC_MPC8315) ||
+ (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_sata(int type)
+{
+ return (type == SOC_MPC8315) ||
+ (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pci(int type)
+{
+ return type != SOC_MPC8308;
+}
+
+bool mpc83xx_has_second_i2c(int type)
+{
+ return (type != SOC_MPC8315) &&
+ (type != SOC_MPC832X);
+}
+
+bool mpc83xx_has_quicc_engine(int type)
+{
+ return (type == SOC_MPC8309) ||
+ (type == SOC_MPC832X) ||
+ (type == SOC_MPC8360);
+}
+
+#endif /* _MPC83XX_SOC_H_ */
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index bf11f40e23..849a69aced 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -75,7 +75,7 @@
/* All PPC boards must swap IDE bytes */
#define CONFIG_IDE_SWAP_IO
-#if defined(CONFIG_DM_SERIAL)
+#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_CLK_MPC83XX)
/*
* TODO: Convert this to a clock driver exists that can give us the UART
* clock here.
diff --git a/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
index e51d060d6a..a02b599265 100644
--- a/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
+++ b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
@@ -6,6 +6,8 @@
#ifndef __FSL_MPC83XX_SERDES_H
#define __FSL_MPC83XX_SERDES_H
+#ifndef CONFIG_MPC83XX_SERDES
+
#include <config.h>
#define FSL_SERDES_CLK_100 (0 << 28)
@@ -19,4 +21,6 @@
extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
+#endif /* !CONFIG_MPC83XX_SERDES */
+
#endif /* __FSL_MPC83XX_SERDES_H */
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index 07d5beaf0e..d00cee95fb 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -30,6 +30,9 @@ struct arch_global_data {
#endif
/* TODO: sjg@chromium.org: Should these be unslgned long? */
#if defined(CONFIG_MPC83xx)
+#ifdef CONFIG_CLK_MPC83XX
+ u32 core_clk;
+#else
/* There are other clocks in the MPC83XX */
u32 csb_clk;
# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
@@ -62,6 +65,7 @@ struct arch_global_data {
u32 mem_sec_clk;
# endif /* CONFIG_MPC8360 */
#endif
+#endif
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
u32 lbc_clk;
void *cpu;
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 34fbfdf1cf..6d76e3e99c 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -282,6 +282,24 @@ static inline void out_be32(volatile unsigned __iomem *addr, u32 val)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+#define readb_be(addr) \
+ __raw_readb((__force unsigned *)(addr))
+#define readw_be(addr) \
+ be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
+#define readl_be(addr) \
+ be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
+#define readq_be(addr) \
+ be64_to_cpu(__raw_readq((__force unsigned *)(addr)))
+
+#define writeb_be(val, addr) \
+ __raw_writeb((val), (__force unsigned *)(addr))
+#define writew_be(val, addr) \
+ __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr))
+#define writel_be(val, addr) \
+ __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
+#define writeq_be(val, addr) \
+ __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr))
+
static inline void *phys_to_virt(phys_addr_t paddr)
{
#ifdef CONFIG_ADDR_MAP
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 6fbe8c46b3..f97ce48cc2 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1325,7 +1325,9 @@ void ll_puts(const char *);
/* In misc.c */
void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
+#ifndef CONFIG_CPU_MPC83XX
int prt_83xx_rsr(void);
+#endif
#endif /* ndef ASSEMBLY*/
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index c3acefaea7..8ac49bdd06 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -17,13 +17,17 @@ endif
ifdef MINIMAL
obj-y += cache.o time.o
+ifndef CONFIG_TIMER
obj-y += ticks.o
+endif
else
obj-y += ppcstring.o
obj-y += ppccache.o
+ifndef CONFIG_TIMER
obj-y += ticks.o
+endif
obj-y += reloc.o
obj-$(CONFIG_BAT_RW) += bat_rw.o
diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index f63e5cf799..19682cfcfa 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -14,6 +14,7 @@
#include <status_led.h>
#endif
+#ifndef CONFIG_MPC83XX_TIMER
#ifdef CONFIG_SHOW_ACTIVITY
void board_show_activity (ulong) __attribute__((weak, alias("__board_show_activity")));
@@ -44,7 +45,7 @@ static __inline__ void set_dec (unsigned long val)
if (val)
asm volatile ("mtdec %0"::"r" (val));
}
-
+#endif /* !CONFIG_MPC83XX_TIMER */
void enable_interrupts (void)
{
@@ -60,6 +61,7 @@ int disable_interrupts (void)
return ((msr & MSR_EE) != 0);
}
+#ifndef CONFIG_MPC83XX_TIMER
int interrupt_init (void)
{
/* call cpu specific function from $(CPU)/interrupts.c */
@@ -102,3 +104,4 @@ ulong get_timer (ulong base)
{
return (timestamp - base);
}
+#endif /* !CONFIG_MPC83XX_TIMER */
generated by cgit (git 2.34.1) at 2024-12-29 15:36:00 +0000