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-rw-r--r--arch/x86/include/asm/arch-sc520/sc520.h26
-rw-r--r--arch/x86/include/asm/global_data.h21
-rw-r--r--arch/x86/include/asm/pci.h5
-rw-r--r--arch/x86/include/asm/realmode.h4
-rw-r--r--arch/x86/include/asm/string.h2
-rw-r--r--arch/x86/include/asm/u-boot-x86.h8
6 files changed, 17 insertions, 49 deletions
diff --git a/arch/x86/include/asm/arch-sc520/sc520.h b/arch/x86/include/asm/arch-sc520/sc520.h
index 5ac9bb81d4..9dc29d39bc 100644
--- a/arch/x86/include/asm/arch-sc520/sc520.h
+++ b/arch/x86/include/asm/arch-sc520/sc520.h
@@ -259,32 +259,6 @@ extern sc520_mmcr_t *sc520_mmcr;
/* Memory Mapped Control Registers (MMCR) Base Address */
#define SC520_MMCR_BASE 0xfffef000
-/* MMCR Addresses (required for assembler code) */
-#define SC520_DRCCTL (SC520_MMCR_BASE + 0x010)
-#define SC520_DRCTMCTL (SC520_MMCR_BASE + 0x012)
-#define SC520_DRCCFG (SC520_MMCR_BASE + 0x014)
-#define SC520_DRCBENDADR (SC520_MMCR_BASE + 0x018)
-#define SC520_ECCCTL (SC520_MMCR_BASE + 0x020)
-#define SC520_DBCTL (SC520_MMCR_BASE + 0x040)
-#define SC520_ECCINT (SC520_MMCR_BASE + 0xd18)
-
-#define SC520_PAR0 (SC520_MMCR_BASE + 0x088)
-#define SC520_PAR1 (SC520_PAR0 + (0x04 * 1))
-#define SC520_PAR2 (SC520_PAR0 + (0x04 * 2))
-#define SC520_PAR3 (SC520_PAR0 + (0x04 * 3))
-#define SC520_PAR4 (SC520_PAR0 + (0x04 * 4))
-#define SC520_PAR5 (SC520_PAR0 + (0x04 * 5))
-#define SC520_PAR6 (SC520_PAR0 + (0x04 * 6))
-#define SC520_PAR7 (SC520_PAR0 + (0x04 * 7))
-#define SC520_PAR8 (SC520_PAR0 + (0x04 * 8))
-#define SC520_PAR9 (SC520_PAR0 + (0x04 * 9))
-#define SC520_PAR10 (SC520_PAR0 + (0x04 * 10))
-#define SC520_PAR11 (SC520_PAR0 + (0x04 * 11))
-#define SC520_PAR12 (SC520_PAR0 + (0x04 * 12))
-#define SC520_PAR13 (SC520_PAR0 + (0x04 * 13))
-#define SC520_PAR14 (SC520_PAR0 + (0x04 * 14))
-#define SC520_PAR15 (SC520_PAR0 + (0x04 * 15))
-
/*
* PARs for maximum allowable 256MB of SDRAM @ 0x00000000
* Two PARs are required due to maximum PAR size of 128MB
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index f177a4fa3b..05a2139d00 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -61,25 +61,6 @@ extern gd_t *gd;
#endif
-/* Word Offsets into Global Data - MUST match struct gd_t */
-#define GD_BD 0
-#define GD_FLAGS 1
-#define GD_BAUDRATE 2
-#define GD_HAVE_CONSOLE 3
-#define GD_RELOC_OFF 4
-#define GD_LOAD_OFF 5
-#define GD_ENV_ADDR 6
-#define GD_ENV_VALID 7
-#define GD_CPU_CLK 8
-#define GD_BUS_CLK 9
-#define GD_RELOC_ADDR 10
-#define GD_START_ADDR_SP 11
-#define GD_RAM_SIZE 12
-#define GD_RESET_STATUS 13
-#define GD_JT 14
-
-#define GD_SIZE 15
-
/*
* Global Data Flags
*/
@@ -91,8 +72,6 @@ extern gd_t *gd;
#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
#define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */
-#define GD_FLG_COLD_BOOT 0x00100 /* Cold Boot */
-#define GD_FLG_WARM_BOOT 0x00200 /* Warm Boot */
#if 0
#define DECLARE_GLOBAL_DATA_PTR
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 85f60d77f0..37cc7e3a0f 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -26,7 +26,10 @@
#ifndef _PCI_I386_H_
#define _PCI_I386_H_ 1
-void pci_setup_type1(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data);
+#define DEFINE_PCI_DEVICE_TABLE(_table) \
+ const struct pci_device_id _table[]
+
+void pci_setup_type1(struct pci_controller *hose);
int pci_enable_legacy_video_ports(struct pci_controller* hose);
int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index c62310e3cd..0f12a893b4 100644
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -25,6 +25,10 @@
#define __ASM_REALMODE_H_
#include <asm/ptrace.h>
+extern ulong __realmode_start;
+extern ulong __realmode_size;
+extern char realmode_enter;
+
int bios_setup(void);
int enter_realmode(u16 seg, u16 off, struct pt_regs *in, struct pt_regs *out);
int enter_realmode_int(u8 lvl, struct pt_regs *in, struct pt_regs *out);
diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h
index 3643a79fdf..3aa6c1131b 100644
--- a/arch/x86/include/asm/string.h
+++ b/arch/x86/include/asm/string.h
@@ -23,7 +23,7 @@ extern void * memmove(void *, const void *, __kernel_size_t);
#undef __HAVE_ARCH_MEMCHR
extern void * memchr(const void *, int, __kernel_size_t);
-#undef __HAVE_ARCH_MEMSET
+#define __HAVE_ARCH_MEMSET
extern void * memset(void *, int, __kernel_size_t);
#undef __HAVE_ARCH_MEMZERO
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index d3e2f4c492..755f88af04 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -24,6 +24,14 @@
#ifndef _U_BOOT_I386_H_
#define _U_BOOT_I386_H_ 1
+/* Exports from the Linker Script */
+extern ulong __text_start;
+extern ulong __data_end;
+extern ulong __rel_dyn_start;
+extern ulong __rel_dyn_end;
+extern ulong __bss_start;
+extern ulong __bss_end;
+
/* cpu/.../cpu.c */
int x86_cpu_init_r(void);
int cpu_init_r(void);