diff options
Diffstat (limited to 'arch/x86')
31 files changed, 434 insertions, 56 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index dfdd7564ea..9ead3ebccf 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -83,6 +83,8 @@ endchoice # subarchitectures-specific options below config INTEL_MID bool "Intel MID platform support" + select REGMAP + select SYSCON help Select to build a U-Boot capable of supporting Intel MID (Mobile Internet Device) platform systems which do not have @@ -316,6 +318,22 @@ config X86_RAMTEST to work correctly. It is not exhaustive but can save time by detecting obvious failures. +config FLASH_DESCRIPTOR_FILE + string "Flash descriptor binary filename" + depends on HAVE_INTEL_ME + default "descriptor.bin" + help + The filename of the file to use as flash descriptor in the + board directory. + +config INTEL_ME_FILE + string "Intel Management Engine binary filename" + depends on HAVE_INTEL_ME + default "me.bin" + help + The filename of the file to use as Intel Management Engine in the + board directory. + config HAVE_FSP bool "Add an Firmware Support Package binary" depends on !EFI diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 1b71d566c9..294dfa6643 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -131,10 +131,8 @@ int arch_cpu_init(void) return x86_cpu_init_f(); } -int print_cpuinfo(void) +int checkcpu(void) { - char processor_name[CPU_MAX_NAME_LEN]; - const char *name; int ret; set_max_freq(); @@ -144,6 +142,14 @@ int print_cpuinfo(void) return ret; gd->arch.pei_boot_mode = PEI_BOOT_NONE; + return 0; +} + +int print_cpuinfo(void) +{ + char processor_name[CPU_MAX_NAME_LEN]; + const char *name; + /* Print processor name */ name = cpu_get_name(processor_name); printf("CPU: %s\n", name); diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index 74736cd56c..774aba6359 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -28,9 +28,11 @@ ulong board_get_usable_ram_top(ulong total_size) return mrc_common_board_get_usable_ram_top(total_size); } -void dram_init_banksize(void) +int dram_init_banksize(void) { mrc_common_dram_init_banksize(); + + return 0; } void broadwell_fill_pei_data(struct pei_data *pei_data) diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 1b042037bb..658b900f0b 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -34,6 +34,11 @@ int board_early_init_f(void) return 0; } +int checkcpu(void) +{ + return 0; +} + int print_cpuinfo(void) { return default_print_cpuinfo(); diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index 7115e7a151..82407affaf 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -104,7 +104,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { int i, j; @@ -121,4 +121,6 @@ void dram_init_banksize(void) } } } + + return 0; } diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c index 993ab8dcde..741613f615 100644 --- a/arch/x86/cpu/efi/efi.c +++ b/arch/x86/cpu/efi/efi.c @@ -18,6 +18,11 @@ int board_early_init_f(void) return 0; } +int checkcpu(void) +{ + return 0; +} + int print_cpuinfo(void) { return default_print_cpuinfo(); diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c index 51599445ab..413e55b596 100644 --- a/arch/x86/cpu/efi/sdram.c +++ b/arch/x86/cpu/efi/sdram.c @@ -22,8 +22,10 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = efi_get_ram_base(); gd->bd->bi_dram[0].size = CONFIG_EFI_RAM_SIZE; + + return 0; } diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index c4aca08f0d..099cb94e5d 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -74,7 +74,7 @@ int arch_cpu_init_dm(void) /* * We should do as little as possible before the serial console is * up. Perhaps this should move to later. Our next lot of init - * happens in print_cpuinfo() when we have a console + * happens in checkcpu() when we have a console */ ret = set_flex_ratio_to_tdp_nominal(); if (ret) @@ -125,12 +125,10 @@ static void enable_usb_bar(struct udevice *bus) pci_bus_write_config(bus, usb3, PCI_COMMAND, cmd, PCI_SIZE_32); } -int print_cpuinfo(void) +int checkcpu(void) { enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE; - char processor_name[CPU_MAX_NAME_LEN]; struct udevice *dev, *lpc; - const char *name; uint32_t pm1_cnt; uint16_t pm1_sts; int ret; @@ -182,6 +180,14 @@ int print_cpuinfo(void) gd->arch.pei_boot_mode = boot_mode; + return 0; +} + +int print_cpuinfo(void) +{ + char processor_name[CPU_MAX_NAME_LEN]; + const char *name; + /* Print processor name */ name = cpu_get_name(processor_name); printf("CPU: %s\n", name); diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 201368c9c7..643d804e35 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -46,9 +46,11 @@ ulong board_get_usable_ram_top(ulong total_size) return mrc_common_board_get_usable_ram_top(total_size); } -void dram_init_banksize(void) +int dram_init_banksize(void) { mrc_common_dram_init_banksize(); + + return 0; } static int read_seed_from_cmos(struct pei_data *pei_data) diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index a88d0d2654..9d84af5ef2 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -26,10 +26,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = 0; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } /* diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index 7153eb21f5..35a146c66a 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -148,6 +148,12 @@ int arch_cpu_init(void) #if !CONFIG_IS_ENABLED(EFI_STUB) && \ !CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT) + +int checkcpu(void) +{ + return 0; +} + int print_cpuinfo(void) { post_code(POST_CPU_INFO); diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c index 40c830af96..47beb86da3 100644 --- a/arch/x86/cpu/quark/dram.c +++ b/arch/x86/cpu/quark/dram.c @@ -162,10 +162,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = 0; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } /* diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index bdd360a99f..0c2cea4ee9 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -264,6 +264,11 @@ int arch_cpu_init_dm(void) return 0; } +int checkcpu(void) +{ + return 0; +} + int print_cpuinfo(void) { post_code(POST_CPU_INFO); diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index f307c622c8..94668a4fda 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -76,13 +76,13 @@ static int __maybe_unused disable_igd(void) * * So the only option we have is to manually remove these two devices. */ - ret = device_remove(igd); + ret = device_remove(igd, DM_REMOVE_NORMAL); if (ret) return ret; ret = device_unbind(igd); if (ret) return ret; - ret = device_remove(sdvo); + ret = device_remove(sdvo, DM_REMOVE_NORMAL); if (ret) return ret; ret = device_unbind(sdvo); diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index db171f750d..cafae15af0 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -67,6 +67,11 @@ int misc_init_r(void) return 0; } +int checkcpu(void) +{ + return 0; +} + int print_cpuinfo(void) { return 0; diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 69c1c1d498..a4321d33de 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -17,8 +17,10 @@ size = <CONFIG_ROM_SIZE>; #ifdef CONFIG_HAVE_INTEL_ME intel-descriptor { + filename = CONFIG_FLASH_DESCRIPTOR_FILE; }; intel-me { + filename = CONFIG_INTEL_ME_FILE; }; #endif #ifdef CONFIG_SPL diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index c651f2f594..c00687a20a 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -54,6 +54,8 @@ enum { X86_NONE, X86_SYSCON_ME, /* Intel Management Engine */ X86_SYSCON_PINCONF, /* Intel x86 pin configuration */ + X86_SYSCON_PMU, /* Power Management Unit */ + X86_SYSCON_SCU, /* System Controller Unit */ }; struct cpuid_result { diff --git a/arch/x86/include/asm/init_helpers.h b/arch/x86/include/asm/init_helpers.h deleted file mode 100644 index ef05ac4781..0000000000 --- a/arch/x86/include/asm/init_helpers.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * (C) Copyright 2011 - * Graeme Russ, <graeme.russ@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _INIT_HELPERS_H_ -#define _INIT_HELPERS_H_ - -int init_cache_f_r(void); - -#endif /* !_INIT_HELPERS_H_ */ diff --git a/arch/x86/include/asm/pmu.h b/arch/x86/include/asm/pmu.h new file mode 100644 index 0000000000..96b968ff8f --- /dev/null +++ b/arch/x86/include/asm/pmu.h @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _X86_ASM_PMU_IPC_H_ +#define _X86_ASM_PMU_IPC_H_ + +int pmu_turn_power(unsigned int lss, bool on); + +#endif /* _X86_ASM_PMU_IPC_H_ */ diff --git a/arch/x86/include/asm/relocate.h b/arch/x86/include/asm/relocate.h deleted file mode 100644 index cff3abc23a..0000000000 --- a/arch/x86/include/asm/relocate.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * (C) Copyright 2011 - * Graeme Russ, <graeme.russ@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _RELOCATE_H_ -#define _RELOCATE_H_ - -#include <common.h> - -int copy_uboot_to_ram(void); -int clear_bss(void); -int do_elf_reloc_fixups(void); - -#endif /* !_RELOCATE_H_ */ diff --git a/arch/x86/include/asm/scu.h b/arch/x86/include/asm/scu.h new file mode 100644 index 0000000000..4d40e495bb --- /dev/null +++ b/arch/x86/include/asm/scu.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _X86_ASM_SCU_IPC_H_ +#define _X86_ASM_SCU_IPC_H_ + +/* IPC defines the following message types */ +#define IPCMSG_WARM_RESET 0xf0 +#define IPCMSG_COLD_RESET 0xf1 +#define IPCMSG_SOFT_RESET 0xf2 +#define IPCMSG_COLD_BOOT 0xf3 +#define IPCMSG_GET_FW_REVISION 0xf4 +#define IPCMSG_WATCHDOG_TIMER 0xf8 /* Set Kernel Watchdog Threshold */ + +struct ipc_ifwi_version { + u16 minor; + u8 major; + u8 hardware_id; + u32 reserved[3]; +}; + +/* Issue commands to the SCU with or without data */ +int scu_ipc_simple_command(u32 cmd, u32 sub); +int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen); + +#endif /* _X86_ASM_SCU_IPC_H_ */ diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 4f901f9392..d2d603967e 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -41,7 +41,6 @@ void x86_disable_caches(void); int x86_init_cache(void); void reset_cpu(ulong addr); ulong board_get_usable_ram_top(ulong total_size); -void dram_init_banksize(void); int default_print_cpuinfo(void); /* Set up a UART which can be used with printch(), printhex8(), etc. */ @@ -55,9 +54,6 @@ u32 isa_map_rom(u32 bus_addr, int size); /* arch/x86/lib/... */ int video_bios_init(void); -/* arch/x86/lib/fsp/... */ -int x86_fsp_init(void); - void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn)); void board_init_f_r(void) __attribute__ ((noreturn)); diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 1c2c085179..d1ad37af64 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -31,7 +31,9 @@ obj-y += pinctrl_ich6.o obj-y += pirq_routing.o obj-y += relocate.o obj-y += physmem.o +obj-$(CONFIG_INTEL_MID) += pmu.o obj-$(CONFIG_X86_RAMTEST) += ramtest.o +obj-$(CONFIG_INTEL_MID) += scu.o obj-y += sections.o obj-y += sfi.o obj-y += string.o diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 3c3d9e1e80..75bab90225 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -100,7 +100,7 @@ static int boot_prep_linux(bootm_headers_t *images) } is_zimage = 1; #if defined(CONFIG_FIT) - } else if (images->fit_uname_os && is_zimage) { + } else if (images->fit_uname_os) { ret = fit_image_get_data(images->fit_hdr_os, images->fit_noffset_os, (const void **)&data, &len); diff --git a/arch/x86/lib/efi/efi.c b/arch/x86/lib/efi/efi.c index ede5d5676b..b1746fa474 100644 --- a/arch/x86/lib/efi/efi.c +++ b/arch/x86/lib/efi/efi.c @@ -92,7 +92,7 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { struct efi_mem_desc *desc, *end; struct efi_entry_memmap *map; @@ -103,7 +103,7 @@ void dram_init_banksize(void) if (ret) { /* We should have stopped in dram_init(), something is wrong */ debug("%s: Missing memory map\n", __func__); - return; + return -ENXIO; } end = (struct efi_mem_desc *)((ulong)map + size); desc = map->desc; @@ -123,6 +123,13 @@ void dram_init_banksize(void) EFI_PAGE_SHIFT; num_banks++; } + + return 0; +} + +int checkcpu(void) +{ + return 0; } int print_cpuinfo(void) diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index 8479af1d7e..66a388d601 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -14,6 +14,11 @@ DECLARE_GLOBAL_DATA_PTR; +int checkcpu(void) +{ + return 0; +} + int print_cpuinfo(void) { post_code(POST_CPU_INFO); @@ -70,7 +75,7 @@ static __maybe_unused void *fsp_prepare_mrc_cache(void) return cache->data; } -int x86_fsp_init(void) +int arch_fsp_init(void) { void *nvs; diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index fcfe693ce5..8b880cd594 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -41,10 +41,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = 0; gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; } /* diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c new file mode 100644 index 0000000000..4ceab8dc64 --- /dev/null +++ b/arch/x86/lib/pmu.c @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dm.h> +#include <regmap.h> +#include <syscon.h> +#include <asm/cpu.h> +#include <asm/pmu.h> +#include <linux/errno.h> +#include <linux/io.h> + +/* Registers */ +struct pmu_regs { + u32 sts; + u32 cmd; + u32 ics; + u32 reserved; + u32 wkc[4]; + u32 wks[4]; + u32 ssc[4]; + u32 sss[4]; +}; + +/* Bits in PMU_REGS_STS */ +#define PMU_REGS_STS_BUSY (1 << 8) + +struct pmu_mid { + struct pmu_regs *regs; +}; + +static int pmu_read_status(struct pmu_regs *regs) +{ + int retry = 500000; + u32 val; + + do { + val = readl(®s->sts); + if (!(val & PMU_REGS_STS_BUSY)) + return 0; + + udelay(1); + } while (--retry); + + printf("WARNING: PMU still busy\n"); + return -EBUSY; +} + +static int pmu_power_lss(struct pmu_regs *regs, unsigned int lss, bool on) +{ + unsigned int offset = (lss * 2) / 32; + unsigned int shift = (lss * 2) % 32; + u32 ssc; + int ret; + + /* Check PMU status */ + ret = pmu_read_status(regs); + if (ret) + return ret; + + /* Read PMU values */ + ssc = readl(®s->sss[offset]); + + /* Modify PMU values */ + if (on) + ssc &= ~(0x3 << shift); /* D0 */ + else + ssc |= 0x3 << shift; /* D3hot */ + + /* Write modified PMU values */ + writel(ssc, ®s->ssc[offset]); + + /* Update modified PMU values */ + writel(0x00002201, ®s->cmd); + + /* Check PMU status */ + return pmu_read_status(regs); +} + +int pmu_turn_power(unsigned int lss, bool on) +{ + struct pmu_mid *pmu; + struct udevice *dev; + int ret; + + ret = syscon_get_by_driver_data(X86_SYSCON_PMU, &dev); + if (ret) + return ret; + + pmu = dev_get_priv(dev); + + return pmu_power_lss(pmu->regs, lss, on); +} + +static int pmu_mid_probe(struct udevice *dev) +{ + struct pmu_mid *pmu = dev_get_priv(dev); + + pmu->regs = syscon_get_first_range(X86_SYSCON_PMU); + + return 0; +} + +static const struct udevice_id pmu_mid_match[] = { + { .compatible = "intel,pmu-mid", .data = X86_SYSCON_PMU }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(intel_mid_pmu) = { + .name = "pmu_mid", + .id = UCLASS_SYSCON, + .of_match = pmu_mid_match, + .probe = pmu_mid_probe, + .priv_auto_alloc_size = sizeof(struct pmu_mid), +}; diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c index 1da5210d27..114f602f7a 100644 --- a/arch/x86/lib/relocate.c +++ b/arch/x86/lib/relocate.c @@ -17,8 +17,8 @@ #include <common.h> #include <inttypes.h> +#include <relocate.h> #include <asm/u-boot-x86.h> -#include <asm/relocate.h> #include <asm/sections.h> #include <elf.h> diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c new file mode 100644 index 0000000000..bb23d0b829 --- /dev/null +++ b/arch/x86/lib/scu.c @@ -0,0 +1,168 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Intel Mobile Internet Devices (MID) based on Intel Atom SoCs have few + * microcontrollers inside to do some auxiliary tasks. One of such + * microcontroller is System Controller Unit (SCU) which, in particular, + * is servicing watchdog and controlling system reset function. + * + * This driver enables IPC channel to SCU. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dm.h> +#include <regmap.h> +#include <syscon.h> +#include <asm/cpu.h> +#include <asm/scu.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/kernel.h> + +/* SCU register map */ +struct ipc_regs { + u32 cmd; + u32 status; + u32 sptr; + u32 dptr; + u32 reserved[28]; + u32 wbuf[4]; + u32 rbuf[4]; +}; + +struct scu { + struct ipc_regs *regs; +}; + +/** + * scu_ipc_send_command() - send command to SCU + * @regs: register map of SCU + * @cmd: command + * + * Command Register (Write Only): + * A write to this register results in an interrupt to the SCU core processor + * Format: + * |rfu2(8) | size(8) | command id(4) | rfu1(3) | ioc(1) | command(8)| + */ +static void scu_ipc_send_command(struct ipc_regs *regs, u32 cmd) +{ + writel(cmd, ®s->cmd); +} + +/** + * scu_ipc_check_status() - check status of last command + * @regs: register map of SCU + * + * Status Register (Read Only): + * Driver will read this register to get the ready/busy status of the IPC + * block and error status of the IPC command that was just processed by SCU + * Format: + * |rfu3(8)|error code(8)|initiator id(8)|cmd id(4)|rfu1(2)|error(1)|busy(1)| + */ +static int scu_ipc_check_status(struct ipc_regs *regs) +{ + int loop_count = 100000; + int status; + + do { + status = readl(®s->status); + if (!(status & BIT(0))) + break; + + udelay(1); + } while (--loop_count); + if (!loop_count) + return -ETIMEDOUT; + + if (status & BIT(1)) { + printf("%s() status=0x%08x\n", __func__, status); + return -EIO; + } + + return 0; +} + +static int scu_ipc_cmd(struct ipc_regs *regs, u32 cmd, u32 sub, + u32 *in, int inlen, u32 *out, int outlen) +{ + int i, err; + + for (i = 0; i < inlen; i++) + writel(*in++, ®s->wbuf[i]); + + scu_ipc_send_command(regs, (inlen << 16) | (sub << 12) | cmd); + err = scu_ipc_check_status(regs); + + if (!err) { + for (i = 0; i < outlen; i++) + *out++ = readl(®s->rbuf[i]); + } + + return err; +} + +/** + * scu_ipc_simple_command() - send a simple command + * @cmd: command + * @sub: sub type + * + * Issue a simple command to the SCU. Do not use this interface if + * you must then access data as any data values may be overwritten + * by another SCU access by the time this function returns. + * + * This function may sleep. Locking for SCU accesses is handled for + * the caller. + */ +int scu_ipc_simple_command(u32 cmd, u32 sub) +{ + struct scu *scu; + struct udevice *dev; + int ret; + + ret = syscon_get_by_driver_data(X86_SYSCON_SCU, &dev); + if (ret) + return ret; + + scu = dev_get_priv(dev); + + scu_ipc_send_command(scu->regs, sub << 12 | cmd); + return scu_ipc_check_status(scu->regs); +} + +int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen) +{ + struct scu *scu; + struct udevice *dev; + int ret; + + ret = syscon_get_by_driver_data(X86_SYSCON_SCU, &dev); + if (ret) + return ret; + + scu = dev_get_priv(dev); + + return scu_ipc_cmd(scu->regs, cmd, sub, in, inlen, out, outlen); +} + +static int scu_ipc_probe(struct udevice *dev) +{ + struct scu *scu = dev_get_priv(dev); + + scu->regs = syscon_get_first_range(X86_SYSCON_SCU); + + return 0; +} + +static const struct udevice_id scu_ipc_match[] = { + { .compatible = "intel,scu-ipc", .data = X86_SYSCON_SCU }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(scu_ipc) = { + .name = "scu_ipc", + .id = UCLASS_SYSCON, + .of_match = scu_ipc_match, + .probe = scu_ipc_probe, + .priv_auto_alloc_size = sizeof(struct scu), +}; diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index ed2d40b552..2b1b450737 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -6,9 +6,9 @@ #include <common.h> #include <debug_uart.h> +#include <init_helpers.h> #include <spl.h> #include <asm/cpu.h> -#include <asm/init_helpers.h> #include <asm/mtrr.h> #include <asm/processor.h> #include <asm-generic/sections.h> |