4 files changed, 43 insertions, 1 deletions
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index c58f6a86a8..87ba849c1c 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -11,6 +11,18 @@
 #include <asm/mrccache.h>
 #include <asm/post.h>
 
+static struct pci_device_id mmc_supported[] = {
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
+	{},
+};
+
+int cpu_mmc_init(bd_t *bis)
+{
+	return pci_mmc_init("ValleyView SDHCI", mmc_supported);
+}
+
 #ifndef CONFIG_EFI_APP
 int arch_cpu_init(void)
 {
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index c36a5892d5..0c2cea4ee9 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -16,6 +16,11 @@
 #include <asm/arch/msg_port.h>
 #include <asm/arch/quark.h>
 
+static struct pci_device_id mmc_supported[] = {
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
+	{},
+};
+
 static void quark_setup_mtrr(void)
 {
 	u32 base, mask;
@@ -323,6 +328,11 @@ int arch_early_init_r(void)
 	return 0;
 }
 
+int cpu_mmc_init(bd_t *bis)
+{
+	return pci_mmc_init("Quark SDHCI", mmc_supported);
+}
+
 int arch_misc_init(void)
 {
 #ifdef CONFIG_ENABLE_MRC_CACHE
diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
index c0681995bd..af3ffad385 100644
--- a/arch/x86/cpu/queensbay/Makefile
+++ b/arch/x86/cpu/queensbay/Makefile
@@ -5,4 +5,4 @@
 #
 
 obj-y += fsp_configs.o irq.o
-obj-y += tnc.o
+obj-y += tnc.o topcliff.o
diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c
new file mode 100644
index 0000000000..b76dd7de69
--- /dev/null
+++ b/arch/x86/cpu/queensbay/topcliff.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <pci_ids.h>
+
+static struct pci_device_id mmc_supported[] = {
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
+	{},
+};
+
+int cpu_mmc_init(bd_t *bis)
+{
+	return pci_mmc_init("Topcliff SDHCI", mmc_supported);
+}