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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig12
-rw-r--r--arch/arm/include/asm/fsl_secure_boot.h54
2 files changed, 28 insertions, 38 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 3e02132537..a77a68d84e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -196,12 +196,12 @@ config SYS_LS_PPA_FW_ADDR
config SYS_LS_PPA_ESBC_ADDR
hex "hdr address of PPA firmware loading from"
depends on FSL_LS_PPA && CHAIN_OF_TRUST
- default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
- default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
- default 0x40480000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
- default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
- default 0x700000 if SYS_LS_PPA_FW_IN_MMC
- default 0x700000 if SYS_LS_PPA_FW_IN_NAND
+ default 0x60680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
+ default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
+ default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
+ default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
+ default 0x680000 if SYS_LS_PPA_FW_IN_MMC
+ default 0x680000 if SYS_LS_PPA_FW_IN_NAND
help
If the PPA header firmware locate at XIP flash, such as NOR or
QSPI flash, this address is a directly memory-mapped.
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h
index b0b3b9377e..63845a2460 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -1,5 +1,6 @@
/*
* Copyright 2015 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -71,55 +72,44 @@
* DDR memory map
*/
#ifdef CONFIG_FSL_LSCH3
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
-#define CONFIG_BS_ADDR_DEVICE 0x580e00000
-#define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
-#define CONFIG_BS_ADDR_RAM 0xa0e00000
-#define CONFIG_BS_HDR_SIZE 0x00002000
+#define CONFIG_BS_ADDR_DEVICE 0x580600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000
#define CONFIG_BS_SIZE 0x00001000
+#define CONFIG_BS_HDR_SIZE 0x00004000
+#define CONFIG_BS_ADDR_RAM 0xa0600000
+#define CONFIG_BS_HDR_ADDR_RAM 0xa0640000
#else
#ifdef CONFIG_SD_BOOT
/* For SD boot address and size are assigned in terms of sector
* offset and no. of sectors respectively.
*/
-#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
-#else
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
-#endif
-#define CONFIG_BS_ADDR_DEVICE 0x00000940
-#define CONFIG_BS_HDR_SIZE 0x00000010
+#define CONFIG_BS_ADDR_DEVICE 0x00003000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00003200
#define CONFIG_BS_SIZE 0x00000008
+#define CONFIG_BS_HDR_SIZE 0x00000010
#elif defined(CONFIG_NAND_BOOT)
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
-#define CONFIG_BS_ADDR_DEVICE 0x00802000
-#define CONFIG_BS_HDR_SIZE 0x00002000
-#define CONFIG_BS_SIZE 0x00001000
-#elif defined(CONFIG_QSPI_BOOT)
-#ifdef CONFIG_ARCH_LS1046A
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
-#define CONFIG_BS_ADDR_DEVICE 0x40800000
-#elif defined(CONFIG_ARCH_LS1012A)
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
-#define CONFIG_BS_ADDR_DEVICE 0x40060000
-#else
-#error "Platform not supported"
-#endif
+#define CONFIG_BS_ADDR_DEVICE 0x00600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00640000
+#define CONFIG_BS_SIZE 0x00001000
#define CONFIG_BS_HDR_SIZE 0x00002000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_BS_ADDR_DEVICE 0x40600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x40640000
#define CONFIG_BS_SIZE 0x00001000
-#else /* Default NOR Boot */
-#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
-#define CONFIG_BS_ADDR_DEVICE 0x60060000
#define CONFIG_BS_HDR_SIZE 0x00002000
+#else /* Default NOR Boot */
+#define CONFIG_BS_ADDR_DEVICE 0x60600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x60640000
#define CONFIG_BS_SIZE 0x00001000
+#define CONFIG_BS_HDR_SIZE 0x00002000
#endif
-#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
-#define CONFIG_BS_ADDR_RAM 0x81020000
+#define CONFIG_BS_ADDR_RAM 0x81000000
+#define CONFIG_BS_HDR_ADDR_RAM 0x81020000
#endif
#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
-#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
+#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
#else
#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
/* BOOTSCRIPT_ADDR is not required */