diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/imx6ul-geam-kit.dts | 4 | ||||
-rw-r--r-- | arch/arm/dts/imx6ul-isiot-emmc.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/imx6ul-isiot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/imx6ul.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/mach-imx/mx6/Kconfig | 9 |
5 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts index 07c21cb0a2..15e3f94153 100644 --- a/arch/arm/dts/imx6ul-geam-kit.dts +++ b/arch/arm/dts/imx6ul-geam-kit.dts @@ -87,6 +87,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; @@ -134,6 +135,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 @@ -145,6 +147,7 @@ }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 @@ -156,6 +159,7 @@ }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts index 677de96473..a611e3bba5 100644 --- a/arch/arm/dts/imx6ul-isiot-emmc.dts +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -50,6 +50,7 @@ }; &usdhc2 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; @@ -60,6 +61,7 @@ &iomuxc { pinctrl_usdhc2: usdhc2grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi index 9a3c35c56a..5007a88f45 100644 --- a/arch/arm/dts/imx6ul-isiot.dtsi +++ b/arch/arm/dts/imx6ul-isiot.dtsi @@ -82,6 +82,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; @@ -128,6 +129,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index def5f8cac9..7affab866f 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -134,6 +134,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + u-boot,dm-spl; pmu { compatible = "arm,cortex-a7-pmu"; @@ -185,6 +186,7 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; + u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -415,6 +417,7 @@ #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, <&iomuxc 16 33 16>; + u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -451,6 +454,7 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; + u-boot,dm-spl; }; gpio5: gpio@020ac000 { @@ -649,6 +653,7 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6ul-iomuxc"; reg = <0x020e0000 0x4000>; + u-boot,dm-spl; }; gpr: iomuxc-gpr@020e4000 { @@ -729,6 +734,7 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; + u-boot,dm-spl; usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index b78ebc1e04..412e48e12a 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -316,6 +316,11 @@ config TARGET_MX6UL_GEAM select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL + config TARGET_MX6UL_ISIOT bool "Support Engicam Is.IoT MX6UL" select BOARD_LATE_INIT @@ -328,6 +333,10 @@ config TARGET_MX6UL_ISIOT select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" |