summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/Kconfig6
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-stm32mp/bsec.c1
-rw-r--r--arch/mips/include/asm/io.h22
-rw-r--r--arch/riscv/lib/bootm.c11
-rw-r--r--arch/sandbox/cpu/os.c7
-rw-r--r--arch/sandbox/dts/test.dts17
-rw-r--r--arch/x86/cpu/baytrail/cpu.c1
-rw-r--r--arch/x86/cpu/broadwell/cpu.c1
-rw-r--r--arch/x86/cpu/cpu_x86.c1
-rw-r--r--arch/x86/cpu/ivybridge/model_206ax.c1
-rw-r--r--arch/x86/cpu/tangier/sysreset.c1
-rw-r--r--arch/x86/include/asm/io.h66
13 files changed, 131 insertions, 5 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 1f2f407d64..9fdd2f7e66 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -110,6 +110,11 @@ config SANDBOX
imply LIBAVB
imply CMD_AVB
imply UDP_FUNCTION_FASTBOOT
+ imply VIRTIO_MMIO
+ imply VIRTIO_PCI
+ imply VIRTIO_SANDBOX
+ imply VIRTIO_BLK
+ imply VIRTIO_NET
config SH
bool "SuperH architecture"
@@ -120,6 +125,7 @@ config X86
select CREATE_ARCH_SYMLINK
select DM
select DM_PCI
+ select HAVE_ARCH_IOMAP
select HAVE_PRIVATE_LIBGCC
select OF_CONTROL
select PCI
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2899a60793..f0e7fde137 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1496,6 +1496,7 @@ source "board/broadcom/bcmns2/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
source "board/eets/pdu001/Kconfig"
+source "board/emulation/qemu-arm/Kconfig"
source "board/freescale/ls2080a/Kconfig"
source "board/freescale/ls2080aqds/Kconfig"
source "board/freescale/ls2080ardb/Kconfig"
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 0e152efc04..d087a31389 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -417,7 +417,6 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
.ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata),
.ops = &stm32mp_bsec_ops,
- .flags = DM_FLAG_PRE_RELOC,
};
/* bsec IP is not present in device tee, manage IP address by platdata */
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 957442effd..7c40e415c7 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -547,6 +547,28 @@ __BUILD_CLRSETBITS(bwlq, sfx, end, type)
#define __to_cpu(v) (v)
#define cpu_to__(v) (v)
+#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v),a)
+#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
+
+#define out_le64(a, v) out_arch(q, le64, a, v)
+#define out_le32(a, v) out_arch(l, le32, a, v)
+#define out_le16(a, v) out_arch(w, le16, a, v)
+
+#define in_le64(a) in_arch(q, le64, a)
+#define in_le32(a) in_arch(l, le32, a)
+#define in_le16(a) in_arch(w, le16, a)
+
+#define out_be64(a, v) out_arch(q, be64, a, v)
+#define out_be32(a, v) out_arch(l, be32, a, v)
+#define out_be16(a, v) out_arch(w, be16, a, v)
+
+#define in_be64(a) in_arch(q, be64, a)
+#define in_be32(a) in_arch(l, be32, a)
+#define in_be16(a) in_arch(w, be16, a)
+
+#define out_8(a, v) __raw_writeb(v, a)
+#define in_8(a) __raw_readb(a)
+
BUILD_CLRSETBITS(b, 8, _, u8)
BUILD_CLRSETBITS(w, le16, le16, u16)
BUILD_CLRSETBITS(w, be16, be16, u16)
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index a7a9fb921b..2b5ccce933 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -9,9 +9,11 @@
#include <common.h>
#include <command.h>
#include <image.h>
-#include <u-boot/zlib.h>
#include <asm/byteorder.h>
#include <asm/csr.h>
+#include <dm/device.h>
+#include <dm/root.h>
+#include <u-boot/zlib.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -57,6 +59,13 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
/* we assume that the kernel is in place */
printf("\nStarting kernel ...\n\n");
+ /*
+ * Call remove function of all devices with a removal flag set.
+ * This may be useful for last-stage operations, like cancelling
+ * of DMA operation or releasing device internal buffers.
+ */
+ dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);
+
cleanup_before_linux();
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
index 07e46471fe..325ded51d8 100644
--- a/arch/sandbox/cpu/os.c
+++ b/arch/sandbox/cpu/os.c
@@ -174,7 +174,12 @@ void *os_malloc(size_t length)
struct os_mem_hdr *hdr;
int page_size = getpagesize();
- hdr = mmap(NULL, length + page_size,
+ /*
+ * Use an address that is hopefully available to us so that pointers
+ * to this memory are fairly obvious. If we end up with a different
+ * address, that's fine too.
+ */
+ hdr = mmap((void *)0x10000000, length + page_size,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
if (hdr == MAP_FAILED)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 57e0dd7663..024aa7c512 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -186,6 +186,10 @@
compatible = "denx,u-boot-fdt-test";
};
+ h-test {
+ compatible = "denx,u-boot-fdt-test1";
+ };
+
clocks {
clk_fixed: clk-fixed {
compatible = "fixed-clock";
@@ -346,14 +350,17 @@
cpu-test1 {
compatible = "sandbox,cpu_sandbox";
+ u-boot,dm-pre-reloc;
};
cpu-test2 {
compatible = "sandbox,cpu_sandbox";
+ u-boot,dm-pre-reloc;
};
cpu-test3 {
compatible = "sandbox,cpu_sandbox";
+ u-boot,dm-pre-reloc;
};
misc-test {
@@ -525,7 +532,7 @@
syscon@0 {
compatible = "sandbox,syscon0";
- reg = <0x10 4>;
+ reg = <0x10 16>;
};
syscon@1 {
@@ -712,6 +719,14 @@
sandbox_tee {
compatible = "sandbox,tee";
};
+
+ sandbox_virtio1 {
+ compatible = "sandbox,virtio1";
+ };
+
+ sandbox_virtio2 {
+ compatible = "sandbox,virtio2";
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
index 56e98131d7..2eb917283b 100644
--- a/arch/x86/cpu/baytrail/cpu.c
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -203,4 +203,5 @@ U_BOOT_DRIVER(cpu_x86_baytrail_drv) = {
.bind = cpu_x86_bind,
.probe = cpu_x86_baytrail_probe,
.ops = &cpu_x86_baytrail_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 02b3169cf5..232fa40eb5 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -764,4 +764,5 @@ U_BOOT_DRIVER(cpu_x86_broadwell_drv) = {
.probe = cpu_x86_broadwell_probe,
.ops = &cpu_x86_broadwell_ops,
.priv_auto_alloc_size = sizeof(struct cpu_broadwell_priv),
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c
index 2b6cc9f22d..1aaf851bb4 100644
--- a/arch/x86/cpu/cpu_x86.c
+++ b/arch/x86/cpu/cpu_x86.c
@@ -94,4 +94,5 @@ U_BOOT_DRIVER(cpu_x86_drv) = {
.of_match = cpu_x86_ids,
.bind = cpu_x86_bind,
.ops = &cpu_x86_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index 33e5c6263d..6edc3e233c 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -478,4 +478,5 @@ U_BOOT_DRIVER(cpu_x86_model_206ax_drv) = {
.bind = cpu_x86_bind,
.probe = cpu_x86_model_206ax_probe,
.ops = &cpu_x86_model_206ax_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/arch/x86/cpu/tangier/sysreset.c b/arch/x86/cpu/tangier/sysreset.c
index e762ee1b81..b03bc28f93 100644
--- a/arch/x86/cpu/tangier/sysreset.c
+++ b/arch/x86/cpu/tangier/sysreset.c
@@ -44,5 +44,4 @@ U_BOOT_DRIVER(tangier_sysreset) = {
.id = UCLASS_SYSRESET,
.of_match = tangier_sysreset_ids,
.ops = &tangier_sysreset_ops,
- .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index c05c6bf8a2..81def0afd3 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -241,6 +241,72 @@ static inline void sync(void)
#define __iormb() dmb()
#define __iowmb() dmb()
+/*
+ * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
+ * access or a MMIO access, these functions don't care. The info is
+ * encoded in the hardware mapping set up by the mapping functions
+ * (or the cookie itself, depending on implementation and hw).
+ *
+ * The generic routines don't assume any hardware mappings, and just
+ * encode the PIO/MMIO as part of the cookie. They coldly assume that
+ * the MMIO IO mappings are not in the low address range.
+ *
+ * Architectures for which this is not true can't use this generic
+ * implementation and should do their own copy.
+ */
+
+/*
+ * We assume that all the low physical PIO addresses (0-0xffff) always
+ * PIO. That means we can do some sanity checks on the low bits, and
+ * don't need to just take things for granted.
+ */
+#define PIO_RESERVED 0x10000UL
+
+/*
+ * Ugly macros are a way of life.
+ */
+#define IO_COND(addr, is_pio, is_mmio) do { \
+ unsigned long port = (unsigned long __force)addr; \
+ if (port >= PIO_RESERVED) { \
+ is_mmio; \
+ } else { \
+ is_pio; \
+ } \
+} while (0)
+
+static inline u8 ioread8(const volatile void __iomem *addr)
+{
+ IO_COND(addr, return inb(port), return readb(addr));
+ return 0xff;
+}
+
+static inline u16 ioread16(const volatile void __iomem *addr)
+{
+ IO_COND(addr, return inw(port), return readw(addr));
+ return 0xffff;
+}
+
+static inline u32 ioread32(const volatile void __iomem *addr)
+{
+ IO_COND(addr, return inl(port), return readl(addr));
+ return 0xffffffff;
+}
+
+static inline void iowrite8(u8 value, volatile void __iomem *addr)
+{
+ IO_COND(addr, outb(value, port), writeb(value, addr));
+}
+
+static inline void iowrite16(u16 value, volatile void __iomem *addr)
+{
+ IO_COND(addr, outw(value, port), writew(value, addr));
+}
+
+static inline void iowrite32(u32 value, volatile void __iomem *addr)
+{
+ IO_COND(addr, outl(value, port), writel(value, addr));
+}
+
#include <asm-generic/io.h>
#endif /* _ASM_IO_H */
generated by cgit (git 2.34.1) at 2024-12-29 03:50:55 +0000