diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/Kconfig | 21 | ||||
| -rw-r--r-- | arch/mips/dts/brcm,bcm63268.dtsi | 2 | ||||
| -rw-r--r-- | arch/mips/dts/brcm,bcm6328.dtsi | 2 | ||||
| -rw-r--r-- | arch/mips/dts/brcm,bcm6358.dtsi | 2 | ||||
| -rw-r--r-- | arch/mips/lib/cache.c | 2 | ||||
| -rw-r--r-- | arch/mips/mach-bmips/Kconfig | 6 |
6 files changed, 23 insertions, 12 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c97ea4156b..d07b92d1b4 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -97,6 +97,7 @@ config TARGET_BOSTON select MIPS_CM select MIPS_L1_CACHE_SHIFT_6 select MIPS_L2_CACHE + select OF_BOARD_SETUP select SUPPORTS_BIG_ENDIAN select SUPPORTS_LITTLE_ENDIAN select SUPPORTS_CPU_MIPS32_R1 @@ -221,6 +222,17 @@ config ROM_EXCEPTION_VECTORS Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL). In that case the image size will be reduced by 0x500 bytes. +config MIPS_CM_BASE + hex "MIPS CM GCR Base Address" + depends on MIPS_CM + default 0x16100000 if TARGET_BOSTON + default 0x1fbf8000 + help + The physical base address at which to map the MIPS Coherence Manager + Global Configuration Registers (GCRs). This should be set such that + the GCRs occupy a region of the physical address space which is + otherwise unused, or at minimum that software doesn't need to access. + endmenu menu "OS boot interface" @@ -393,15 +405,6 @@ config MIPS_CM wish U-Boot to configure it or make use of it to retrieve system information such as cache configuration. -config MIPS_CM_BASE - hex - default 0x1fbf8000 - help - The physical base address at which to map the MIPS Coherence Manager - Global Configuration Registers (GCRs). This should be set such that - the GCRs occupy a region of the physical address space which is - otherwise unused, or at minimum that software doesn't need to access. - endif endmenu diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index 3d0f8e0ea1..b03763f093 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -136,7 +136,7 @@ memory-controller@10003000 { compatible = "brcm,bcm6328-mc"; - reg = <0x10003000 0x1000>; + reg = <0x10003000 0x894>; u-boot,dm-pre-reloc; }; }; diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index 4adc83fcb4..3926885899 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -120,7 +120,7 @@ memory-controller@10003000 { compatible = "brcm,bcm6328-mc"; - reg = <0x10003000 0x1000>; + reg = <0x10003000 0x864>; u-boot,dm-pre-reloc; }; }; diff --git a/arch/mips/dts/brcm,bcm6358.dtsi b/arch/mips/dts/brcm,bcm6358.dtsi index df75988c82..0dad998501 100644 --- a/arch/mips/dts/brcm,bcm6358.dtsi +++ b/arch/mips/dts/brcm,bcm6358.dtsi @@ -133,7 +133,7 @@ memory-controller@fffe1200 { compatible = "brcm,bcm6358-mc"; - reg = <0xfffe1200 0x1000>; + reg = <0xfffe1200 0x4c>; u-boot,dm-pre-reloc; }; }; diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index bd14ba6ea7..91b037f87d 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -7,7 +7,9 @@ #include <common.h> #include <asm/cacheops.h> +#ifdef CONFIG_MIPS_L2_CACHE #include <asm/cm.h> +#endif #include <asm/mipsregs.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig index d1684486a8..4a0c383475 100644 --- a/arch/mips/mach-bmips/Kconfig +++ b/arch/mips/mach-bmips/Kconfig @@ -63,6 +63,11 @@ config BOARD_HUAWEI_HG556A depends on SOC_BMIPS_BCM6358 select BMIPS_SUPPORTS_BOOT_RAM +config BOARD_SFR_NB4_SER + bool "SFR NeufBox 4 (Sercomm)" + depends on SOC_BMIPS_BCM6358 + select BMIPS_SUPPORTS_BOOT_RAM + endchoice choice @@ -84,5 +89,6 @@ config BMIPS_SUPPORTS_BOOT_RAM source "board/comtrend/ar5387un/Kconfig" source "board/comtrend/vr3032u/Kconfig" source "board/huawei/hg556a/Kconfig" +source "board/sfr/nb4_ser/Kconfig" endmenu |