diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arc/include/asm/config.h | 1 | ||||
| -rw-r--r-- | arch/arm/imx-common/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/lib/board.c | 2 | ||||
| -rw-r--r-- | arch/openrisc/cpu/start.S | 55 | ||||
| -rw-r--r-- | arch/openrisc/include/asm/spr-defs.h | 13 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/cpu.c | 3 |
6 files changed, 55 insertions, 23 deletions
diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index 3d331cc970..e5be078c19 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -8,6 +8,7 @@ #define __ASM_ARC_CONFIG_H_ #define CONFIG_SYS_GENERIC_GLOBAL_DATA +#define CONFIG_SYS_BOOT_RAMDISK_HIGH #define CONFIG_LMB diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 0e713952dc..6c655773e8 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -33,10 +33,6 @@ $(IMX_CONFIG): %.cfgtmp: % FORCE $(Q)mkdir -p $(dir $@) $(call if_changed_dep,cpp_cfg) -quiet_cmd_mkimage = MKIMAGE $@ -cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ - $(if $(KBUILD_VERBOSE:1=), >/dev/null) - MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $< $(PHONY),$^) -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 9b473b5eab..76adaf3aa4 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -277,7 +277,7 @@ void board_init_f(ulong bootflag) gd->mon_len = (ulong)&__bss_end - (ulong)_start; #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ - gd->fdt_blob = __dtb_db_begin; + gd->fdt_blob = __dtb_dt_begin; #elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = &_end; diff --git a/arch/openrisc/cpu/start.S b/arch/openrisc/cpu/start.S index c54b0cfc98..1ae3b75f3b 100644 --- a/arch/openrisc/cpu/start.S +++ b/arch/openrisc/cpu/start.S @@ -1,6 +1,7 @@ /* * (C) Copyright 2011, Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> * (C) Copyright 2011, Julius Baxter <julius@opencores.org> + * (C) Copyright 2014, Franck Jullien <franck.jullien@gmail.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -40,9 +41,48 @@ __reset: l.ori r3,r0,SPR_SR_SM l.mtspr r0,r3,SPR_SR + l.jal _cur + l.nop +_cur: + l.ori r8, r9, 0 /* Get _cur current address */ + + l.movhi r3, hi(_cur) + l.ori r3, r3, lo(_cur) + l.sfeq r8, r3 /* If we are running at the linked address */ + l.bf _no_vector_reloc /* there is not need for relocation */ + l.sub r8, r8, r3 + + l.mfspr r4, r0, SPR_CPUCFGR + l.andi r4, r4, SPR_CPUCFGR_EVBARP /* Exception Vector Base Address Register present ? */ + l.sfnei r4,0 + l.bnf _reloc_vectors + l.movhi r5, 0 /* Destination */ + + l.mfspr r4, r0, SPR_EVBAR + l.add r5, r5, r4 + +_reloc_vectors: + /* Relocate vectors*/ + l.movhi r5, 0 /* Destination */ + l.movhi r6, hi(__start) /* Length */ + l.ori r6, r6, lo(__start) + l.ori r3, r8, 0 + +.L_relocvectors: + l.lwz r7, 0(r3) + l.sw 0(r5), r7 + l.addi r5, r5, 4 + l.sfeq r5, r6 + l.bnf .L_relocvectors + l.addi r3, r3, 4 + +_no_vector_reloc: + /* Relocate u-boot */ - l.movhi r3,hi(__start) /* source start address */ + l.movhi r3,hi(__start) /* source start offset */ l.ori r3,r3,lo(__start) + l.add r3,r8,r3 + l.movhi r4,hi(_stext) /* dest start address */ l.ori r4,r4,lo(_stext) l.movhi r5,hi(__end) /* dest end address */ @@ -56,19 +96,6 @@ __reset: l.bf .L_reloc l.addi r4,r4,4 /* delay slot */ -#ifdef CONFIG_SYS_RELOCATE_VECTORS - /* Relocate vectors from 0xf0000000 to 0x00000000 */ - l.movhi r4, 0xf000 /* source */ - l.movhi r5, 0 /* destination */ - l.addi r6, r5, CONFIG_SYS_VECTORS_LEN /* length */ -.L_relocvectors: - l.lwz r7, 0(r4) - l.sw 0(r5), r7 - l.addi r5, r5, 4 - l.sfeq r5,r6 - l.bnf .L_relocvectors - l.addi r4,r4, 4 -#endif l.movhi r4,hi(_start) l.ori r4,r4,lo(_start) l.jr r4 diff --git a/arch/openrisc/include/asm/spr-defs.h b/arch/openrisc/include/asm/spr-defs.h index a863b3e0e4..e30d2104a0 100644 --- a/arch/openrisc/include/asm/spr-defs.h +++ b/arch/openrisc/include/asm/spr-defs.h @@ -46,6 +46,11 @@ #define SPR_ICCFGR (SPRGROUP_SYS + 6) #define SPR_DCFGR (SPRGROUP_SYS + 7) #define SPR_PCCFGR (SPRGROUP_SYS + 8) +#define SPR_VR2 (SPRGROUP_SYS + 9) +#define SPR_AVR (SPRGROUP_SYS + 10) +#define SPR_EVBAR (SPRGROUP_SYS + 11) +#define SPR_AECR (SPRGROUP_SYS + 12) +#define SPR_AESR (SPRGROUP_SYS + 13) #define SPR_NPC (SPRGROUP_SYS + 16) #define SPR_SR (SPRGROUP_SYS + 17) #define SPR_PPC (SPRGROUP_SYS + 18) @@ -161,7 +166,13 @@ #define SPR_CPUCFGR_OF32S 0x00000080 /* ORFPX32 supported */ #define SPR_CPUCFGR_OF64S 0x00000100 /* ORFPX64 supported */ #define SPR_CPUCFGR_OV64S 0x00000200 /* ORVDX64 supported */ -#define SPR_CPUCFGR_RES 0xfffffc00 /* Reserved */ +#define SPR_CPUCFGR_ND 0x00000400 /* No delay slot */ +#define SPR_CPUCFGR_AVRP 0x00000800 /* Arch. Version Register present */ +#define SPR_CPUCFGR_EVBARP 0x00001000 /* Exception Vector Base Address Register (EVBAR) present */ +#define SPR_CPUCFGR_ISRP 0x00002000 /* Implementation-Specific Registers (ISR0-7) present */ +#define SPR_CPUCFGR_AECSRP 0x00004000 /* Arithmetic Exception Control Register (AECR) and */ + /* Arithmetic Exception Status Register (AESR) presents */ +#define SPR_CPUCFGR_RES 0xffffc000 /* Reserved */ /* * Bit definitions for the Debug configuration register and other diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c index d1fc7f3fc2..6a485264e7 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu.c +++ b/arch/powerpc/cpu/ppc4xx/cpu.c @@ -607,9 +607,6 @@ int checkcpu (void) #if defined(SDR0_PINSTP_SHIFT) printf (" Bootstrap Option %c - ", bootstrap_char[bootstrap_option()]); printf ("Boot ROM Location %s", bootstrap_str[bootstrap_option()]); -#ifdef CONFIG_NAND_U_BOOT - puts(", booting from NAND"); -#endif /* CONFIG_NAND_U_BOOT */ putc('\n'); #endif /* SDR0_PINSTP_SHIFT */ |