diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/arm1136/mx31/generic.c | 11 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx31/imx-regs.h | 35 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx31/sys_proto.h | 35 |
3 files changed, 78 insertions, 3 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 5524b23275..78df7b9261 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -25,6 +25,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> #include <asm/io.h> +#include <asm/arch/sys_proto.h> static u32 mx31_decode_pll(u32 reg, u32 infreq) { @@ -140,6 +141,16 @@ void mx31_set_pad(enum iomux_pins pin, u32 config) } +void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs) +{ + struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE; + struct mx31_weim_cscr *cscr = &weim->cscr[cs]; + + writel(weimcs->upper, &cscr->upper); + writel(weimcs->lower, &cscr->lower); + writel(weimcs->additional, &cscr->additional); +} + struct mx3_cpu_type mx31_cpu_type[] = { { .srev = 0x00, .v = 0x10 }, { .srev = 0x10, .v = 0x11 }, diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index f263e6bcfa..552c8214e4 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -472,6 +472,18 @@ enum iomux_pins { #define CCM_RCSR_NF16B (1 << 31) #define CCM_RCSR_NFMS (1 << 30) +/* WEIM CS control registers */ +struct mx31_weim_cscr { + u32 upper; + u32 lower; + u32 additional; + u32 reserved; +}; + +struct mx31_weim { + struct mx31_weim_cscr cscr[6]; +}; + #endif #define __REG(x) (*((volatile u32 *)(x))) @@ -550,10 +562,27 @@ enum iomux_pins { #define ESDCTL_BL(x) ((x) << 7) #define ESDCTL_PRCT(x) ((x) << 0) +/* 13 fields of the upper CS control register */ +#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \ + cnc, wsc, ew, wws, edc) \ + ((sp) << 31 | (wp) << 30 | (bcd) << 28 | (psz) << 22 | (pme) << 21 |\ + (sync) << 20 | (dol) << 16 | (cnc) << 14 | (wsc) << 8 | (ew) << 7 |\ + (wws) << 4 | (edc) << 0) +/* 12 fields of the lower CS control register */ +#define CSCR_L(oea, oen, ebwa, ebwn, \ + csa, ebc, dsz, csn, psr, cre, wrap, csen) \ + ((oea) << 28 | (oen) << 24 | (ebwa) << 20 | (ebwn) << 16 |\ + (csa) << 12 | (ebc) << 11 | (dsz) << 8 | (csn) << 4 |\ + (psr) << 3 | (cre) << 2 | (wrap) << 1 | (csen) << 0) +/* 14 fields of the additional CS control register */ +#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \ + wwu, age, cnc2, fce) \ + ((ebra) << 28 | (ebrn) << 24 | (rwa) << 20 | (rwn) << 16 |\ + (mum) << 15 | (lah) << 13 | (lbn) << 10 | (lba) << 8 |\ + (dww) << 6 | (dct) << 4 | (wwu) << 3 |\ + (age) << 2 | (cnc2) << 1 | (fce) << 0) + #define WEIM_BASE 0xb8002000 -#define CSCR_U(x) (WEIM_BASE + (x) * 0x10) -#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10) -#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10) #define IOMUXC_BASE 0x43FAC000 #define IOMUXC_GPR (IOMUXC_BASE + 0x8) diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h b/arch/arm/include/asm/arch-mx31/sys_proto.h new file mode 100644 index 0000000000..76003030d7 --- /dev/null +++ b/arch/arm/include/asm/arch-mx31/sys_proto.h @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2011 + * Helmut Raiger, HALE electronic GmbH, helmut.raiger@hale.at + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SYS_PROTO_H_ +#define _SYS_PROTO_H_ + +struct mxc_weimcs { + u32 upper; + u32 lower; + u32 additional; +}; + +void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs); + +#endif |